diff options
author | Nicolas Boichat <drinkcat@google.com> | 2016-04-14 18:28:50 +0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2016-05-03 05:03:08 -0700 |
commit | 427b8f9cd9b7ef23c1562ca5ac0e4706b53f1c7e (patch) | |
tree | 028d7ddfc2d00d6cba5054d15c7ef5f6afab305a /board/elm/board.c | |
parent | 3d030e640908efaf1a3948b9c4c4280c8d404a4c (diff) | |
download | chrome-ec-427b8f9cd9b7ef23c1562ca5ac0e4706b53f1c7e.tar.gz |
elm: Set USB_DP_HPD as input
This makes all board_typec_*dp* functions irrelevant: remove them.
BRANCH=none
BUG=chrome-os-partner:52352
TEST=USB_DP_HPD_C from AP side indicates which output is currently
in use (native HDMI or ANX7688)
Change-Id: Id60ab97ee9ce987ec4e36e5fd9be9a20908edbfe
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/338868
Commit-Ready: Koro Chen <koro.chen@mediatek.com>
Tested-by: Koro Chen <koro.chen@mediatek.com>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Diffstat (limited to 'board/elm/board.c')
-rw-r--r-- | board/elm/board.c | 73 |
1 files changed, 0 insertions, 73 deletions
diff --git a/board/elm/board.c b/board/elm/board.c index a1bf08f3e9..9394acea09 100644 --- a/board/elm/board.c +++ b/board/elm/board.c @@ -167,12 +167,6 @@ struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = { }; /** - * Store the current DP hardware route. - */ -static int dp_hw_port = PD_PORT_NONE; -static struct mutex dp_hw_lock; - -/** * Reset PD MCU * ANX7688 needs a reset pulse of 50ms after power enable. */ @@ -338,73 +332,6 @@ int board_get_ramp_current_limit(int supplier, int sup_curr) } } -static void board_typec_set_dp_hpd(int port, int level) -{ - gpio_set_level(GPIO_USB_DP_HPD, level); -} - -static void hpd_irq_deferred(void) -{ - board_typec_set_dp_hpd(dp_hw_port, 1); -} -DECLARE_DEFERRED(hpd_irq_deferred); - -/** - * Turn on DP hardware on type-C port. - */ -void board_typec_dp_on(int port) -{ - mutex_lock(&dp_hw_lock); - - if (dp_hw_port != !port) { - /* Get control of DP hardware */ - dp_hw_port = port; - if (!gpio_get_level(GPIO_USB_DP_HPD)) { - board_typec_set_dp_hpd(port, 1); - } else { - board_typec_set_dp_hpd(port, 0); - hook_call_deferred(&hpd_irq_deferred_data, - HPD_DSTREAM_DEBOUNCE_IRQ); - } - } - - mutex_unlock(&dp_hw_lock); -} - -/** - * Turn off a PD port's DP output. - */ -void board_typec_dp_off(int port, int *dp_flags) -{ - mutex_lock(&dp_hw_lock); - - if (dp_hw_port == !port) { - mutex_unlock(&dp_hw_lock); - return; - } - - dp_hw_port = PD_PORT_NONE; - board_typec_set_dp_hpd(port, 0); - - mutex_unlock(&dp_hw_lock); -} - -/** - * Set DP hotplug detect level. - */ -void board_typec_dp_set(int port, int level) -{ - mutex_lock(&dp_hw_lock); - - if (dp_hw_port == PD_PORT_NONE) - dp_hw_port = port; - - if (dp_hw_port == port) - board_typec_set_dp_hpd(port, level); - - mutex_unlock(&dp_hw_lock); -} - /** * Set AP reset. * AP_RESET_L (PC3, CPU_WARM_RESET_L) is connected to PMIC SYSRSTB |