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authorAnton Staaf <robotboy@chromium.org>2014-12-02 10:37:54 -0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-12-08 21:51:52 +0000
commit731a2e74872159ecfa910c3174e9d3ae50ff2dae (patch)
tree84de2d9b11eee75f206c0dc008d98813e4e32c03 /board/discovery-stm32f072
parent0f4550468fac985711ef10629ad9d5129c9e4539 (diff)
downloadchrome-ec-731a2e74872159ecfa910c3174e9d3ae50ff2dae.tar.gz
USB-SPI: Support board enable/disable functionality
This allows the USB SPI bridge to be controlled from the host at a larger timescale than a single SPI transaction. This allows the host to signal that many transactions will take place and that the device should keep the SPI bridge enabled across them. This allows the device to hold the AP or other possible user of the SPI bus in reset while the bridge is enabled. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Ifd6f96b0ff47f35d853735d44e255a205b0e677a Reviewed-on: https://chromium-review.googlesource.com/232732 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'board/discovery-stm32f072')
-rw-r--r--board/discovery-stm32f072/board.c34
-rw-r--r--board/discovery-stm32f072/spi.c17
2 files changed, 35 insertions, 16 deletions
diff --git a/board/discovery-stm32f072/board.c b/board/discovery-stm32f072/board.c
index 8beae33e74..99e0af0b1d 100644
--- a/board/discovery-stm32f072/board.c
+++ b/board/discovery-stm32f072/board.c
@@ -9,8 +9,10 @@
#include "gpio.h"
#include "hooks.h"
#include "registers.h"
+#include "spi.h"
#include "task.h"
#include "usb_gpio.h"
+#include "usb_spi.h"
#include "util.h"
void button_event(enum gpio_signal signal);
@@ -53,6 +55,38 @@ const void *const usb_strings[] = {
BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
+void usb_spi_board_enable(struct usb_spi_config const *config)
+{
+ /* Remap SPI2 to DMA channels 6 and 7 */
+ STM32_SYSCFG_CFGR1 |= (1 << 24);
+
+ /* Configure SPI GPIOs */
+ gpio_config_module(MODULE_SPI_MASTER, 1);
+
+ /* Set all four SPI pins to high speed */
+ STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000;
+
+ /* Enable clocks to SPI2 module */
+ STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2;
+
+ /* Reset SPI2 */
+ STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2;
+ STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2;
+
+ spi_enable(1);
+}
+
+void usb_spi_board_disable(struct usb_spi_config const *config)
+{
+ spi_enable(0);
+
+ /* Disable clocks to SPI2 module */
+ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2;
+
+ /* Release SPI GPIOs */
+ gpio_config_module(MODULE_SPI_MASTER, 0);
+}
+
/* Initialize board. */
static void board_init(void)
{
diff --git a/board/discovery-stm32f072/spi.c b/board/discovery-stm32f072/spi.c
index 225592f20a..b768bb42bc 100644
--- a/board/discovery-stm32f072/spi.c
+++ b/board/discovery-stm32f072/spi.c
@@ -18,22 +18,7 @@ USB_SPI_CONFIG(usb_spi, USB_IFACE_SPI, USB_EP_SPI, usb_spi_ready)
void usb_spi_task(void)
{
- /* Remap SPI2 to DMA channels 6 and 7 */
- STM32_SYSCFG_CFGR1 |= (1 << 24);
-
- gpio_config_module(MODULE_SPI_MASTER, 1);
-
- /* Set all four SPI pins to high speed */
- STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000;
-
- /* Enable clocks to SPI2 module */
- STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2;
-
- /* Reset SPI2 */
- STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2;
- STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2;
-
- spi_enable(1);
+ usb_spi_enable(&usb_spi. 1);
while (1) {
task_wait_event(-1);