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authorVadim Bendebury <vbendeb@chromium.org>2020-01-13 08:47:51 +1100
committerCommit Bot <commit-bot@chromium.org>2020-01-13 19:34:01 +0000
commit6bfa838a0d5fd9498ac0c298bfb08b99b5fe4a7e (patch)
treea1235fddd97d2525edee17afda6061a8c88c560b /board/cr50
parentf15eb886693218bb2bd8891fef0c3500ab537e56 (diff)
downloadchrome-ec-6bfa838a0d5fd9498ac0c298bfb08b99b5fe4a7e.tar.gz
drop chip factory mode support
There is no need to keep the code supporting chip factory mode in Chrome OS production branches, this code is never used outside of the chip factory environment. BRANCH=cr50, cr50-mp BUG=none TEST=built an image, verified that an Atlas device boots up into the previously created Chrome OS account. Change-Id: If72635b014d15ef6e97fbc4fd5b54b61ec23299a Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1994369 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Diffstat (limited to 'board/cr50')
-rw-r--r--board/cr50/board.c19
-rw-r--r--board/cr50/board.h3
2 files changed, 0 insertions, 22 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c
index 4eeb21fc23..e3d46c9e8f 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -1352,11 +1352,6 @@ static uint32_t get_properties(void)
uint8_t config;
uint32_t properties;
- if (chip_factory_mode()) {
- CPRINTS("Chip factory mode, short circuit to SPI");
- return BOARD_SLAVE_CONFIG_SPI;
- }
-
#ifdef H1_RED_BOARD
CPRINTS("Unconditionally enabling SPI and platform reset");
return (BOARD_SLAVE_CONFIG_SPI | BOARD_USE_PLT_RESET);
@@ -1635,20 +1630,6 @@ static int command_board_properties(int argc, char **argv)
DECLARE_SAFE_CONSOLE_COMMAND(brdprop, command_board_properties,
NULL, "Display board properties");
-int chip_factory_mode(void)
-{
- static uint8_t mode_set;
-
- /*
- * Bit 0x2 used to indicate that mode has been set, bit 0x1 is the
- * actual indicator of the chip factory mode.
- */
- if (!mode_set)
- mode_set = 2 | !!gpio_get_level(GPIO_DIOB4);
-
- return mode_set & 1;
-}
-
#ifdef CR50_RELAXED
static int command_rollback(int argc, char **argv)
{
diff --git a/board/cr50/board.h b/board/cr50/board.h
index 5a8c02f453..12b2e72a1b 100644
--- a/board/cr50/board.h
+++ b/board/cr50/board.h
@@ -363,9 +363,6 @@ int board_nvmem_legacy_check_needed(void);
void set_ap_on(void);
-/* Returns True if chip is brought up in a factory test harness. */
-int chip_factory_mode(void);
-
/*
* Trigger generation of the ITE SYNC sequence on the way up after next
* reboot.