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| author | Caveh Jalali <caveh@chromium.org> | 2021-06-24 20:12:03 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-06-29 18:00:32 +0000 |
| commit | 7276c5d5839b15c8006171e7402895fc0d209275 (patch) | |
| tree | 03f3b6a6b3cecb21a7aa67d06eb9ab62bfe5e735 /board/brya | |
| parent | 51a8b8fba91e2eb24b50bd26807174d8758c73f0 (diff) | |
| download | chrome-ec-7276c5d5839b15c8006171e7402895fc0d209275.tar.gz | |
brya: Remove USB_C1_RT_INT_ODL as interrupt source
This disables interrupts on USB_C1_RT_INT_ODL. We do not use this pin
with the current selection of USB DBs.
BRANCH=none
BUG=b:183452273
TEST=boots on board ID 1
Change-Id: I423d5c1c3ef6e86f393fc9ce35230f1c6ab62607
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987914
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
Diffstat (limited to 'board/brya')
| -rw-r--r-- | board/brya/generated-gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/brya/generated-gpio.inc b/board/brya/generated-gpio.inc index bb72861263..4daa60c5c9 100644 --- a/board/brya/generated-gpio.inc +++ b/board/brya/generated-gpio.inc @@ -26,7 +26,6 @@ GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, ppc_interr GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, retimer_interrupt) GPIO_INT(USB_C1_BC12_INT_ODL, PIN(5, 0), GPIO_INT_FALLING, bc12_interrupt) GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, ppc_interrupt) -GPIO_INT(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INT_FALLING, retimer_interrupt) GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event) GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt) GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) @@ -74,6 +73,7 @@ GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) GPIO(USB_C1_RST_ODL, PIN(9, 6), GPIO_ODR_LOW) +GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT) GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) |