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| author | Scott Collyer <scollyer@google.com> | 2018-07-11 12:24:34 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-07-11 18:48:49 -0700 |
| commit | 8b21cf786051967741794db220c882639dbfefec (patch) | |
| tree | 4eaffea845319b44af2d87935a9592a3b7be87a0 /baseboard | |
| parent | 1f01861126587b8ee8b5634d538a799295d87dc7 (diff) | |
| download | chrome-ec-8b21cf786051967741794db220c882639dbfefec.tar.gz | |
octopus: Move board_hibernate delay for TCPC low power mode
board_hibernate() may need to access the TCPCs, which in turn will
cause the TCPCs to exit low power mode. If the EC is then put into
hibernate, then the TCPC is left in normal mode.
This CL moves a msleep call which was already there to happen after
all possible TCPC accesses. The timer was also changed from 100 to 200
msec to ensure enough time for the low power mode operation to
complete. Measuring using a logic analyzer showed that this took ~100
msec to complete.
BUG=b:78242079
BRANCH=none
TEST=Manual
using dut-control pp3300_pd_a_mw -z 100 -t 300 to measure the PD power
rail, verified that the power level did not increase when 'hibernate'
command was issued on the EC console. In addition, using the logic
analyzer verified that I2CIDLE command is written to both TCPCs during
the msleep delay.
Change-Id: Iec48c78c6d643b0bbf5a82943e0a99c5cbff4575
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1134039
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Tested-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'baseboard')
| -rw-r--r-- | baseboard/octopus/baseboard.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/baseboard/octopus/baseboard.c b/baseboard/octopus/baseboard.c index c7aed920a6..081a20278c 100644 --- a/baseboard/octopus/baseboard.c +++ b/baseboard/octopus/baseboard.c @@ -294,12 +294,6 @@ void board_hibernate(void) pd_request_source_voltage(port, NX20P3483_SAFE_RESET_VBUS_MV); #endif - /* - * Delay allows AP power state machine to settle down along - * with any PD contract renegotiation. - */ - msleep(100); - for (port = 0; port < CONFIG_USB_PD_PORT_COUNT; port++) { /* * If Vbus isn't already on this port, then open the SNK path @@ -310,4 +304,11 @@ void board_hibernate(void) if (!pd_is_vbus_present(port)) ppc_vbus_sink_enable(port, 1); } + + /* + * Delay allows AP power state machine to settle down along + * with any PD contract renegotiation, and tcpm to put TCPC into low + * power mode if required. + */ + msleep(200); } |