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author | Edward Hill <ecgh@chromium.org> | 2018-05-23 17:11:17 -0600 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-25 20:31:50 -0700 |
commit | 092e647d99c0100f0a51574eda28cc6130bb0df2 (patch) | |
tree | ea3a9142fa1eb36e5ef777ab0a557f93e13868f5 /baseboard | |
parent | 4ab9fc9fa9a0a246bc78eb70d301457abe8dc79b (diff) | |
download | chrome-ec-092e647d99c0100f0a51574eda28cc6130bb0df2.tar.gz |
careena: Make GPIOs match hardware
Update GPIO definitions for Careena to match hardware.
BUG=b:79704826
BRANCH=none
TEST=make BOARD=careena
Change-Id: I755e5fd8123eefdfa8d30ca2314435c28340e488
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070989
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'baseboard')
-rw-r--r-- | baseboard/grunt/baseboard.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/baseboard/grunt/baseboard.c b/baseboard/grunt/baseboard.c index 8bd2232cb9..d7870d5c23 100644 --- a/baseboard/grunt/baseboard.c +++ b/baseboard/grunt/baseboard.c @@ -131,7 +131,7 @@ unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); /* BC 1.2 chip Configuration */ const struct bq24392_config_t bq24392_config[CONFIG_USB_PD_PORT_COUNT] = { [USB_PD_PORT_ANX74XX] = { - .chip_enable_pin = GPIO_USB_C0_BC12_VBUS_ON_L_V2, + .chip_enable_pin = GPIO_USB_C0_BC12_VBUS_ON_L, .chg_det_pin = GPIO_USB_C0_BC12_CHG_DET, .flags = BQ24392_FLAGS_ENABLE_ACTIVE_LOW, }, |