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authorAyushee <ayushee.shah@intel.com>2019-08-15 17:44:45 -0700
committerCommit Bot <commit-bot@chromium.org>2019-08-23 09:53:33 +0000
commit45fc143161963b53856f8869088239cf44fea265 (patch)
tree2cdc48b4ae445c674e6e1dd15ad4033984aee3c4 /baseboard
parentba6067286a1659fc946dbbbe511b5c6413dc2138 (diff)
downloadchrome-ec-45fc143161963b53856f8869088239cf44fea265.tar.gz
tglrvpu_ite: Adding VCONN support
Added GPIOs pin config to support VCONN on tglrvp. Also added power switch function to enable/disable VCONN according to the cc lines. BRANCH=None BUG=b:139763031 TEST=Able to get characteristics of an E-marked cable Change-Id: Ib09307aafe68ea955f256d3f35670579072c3040 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1762591 Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'baseboard')
-rw-r--r--baseboard/dragonegg/baseboard.c2
-rw-r--r--baseboard/hatch/baseboard.c2
-rw-r--r--baseboard/intelrvp/baseboard.h12
-rw-r--r--baseboard/intelrvp/ite_ec.c20
-rw-r--r--baseboard/intelrvp/ite_ec.h5
-rw-r--r--baseboard/octopus/variant_usbc_ec_tcpcs.c2
6 files changed, 40 insertions, 3 deletions
diff --git a/baseboard/dragonegg/baseboard.c b/baseboard/dragonegg/baseboard.c
index ecd6ee5862..36f054c376 100644
--- a/baseboard/dragonegg/baseboard.c
+++ b/baseboard/dragonegg/baseboard.c
@@ -270,7 +270,7 @@ void board_reset_pd_mcu(void)
* but it will get reset when the EC gets reset.
*/
}
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
{
/*
* We ignore the cc_pin because the polarity should already be set
diff --git a/baseboard/hatch/baseboard.c b/baseboard/hatch/baseboard.c
index fbd793a46c..58f795ed9f 100644
--- a/baseboard/hatch/baseboard.c
+++ b/baseboard/hatch/baseboard.c
@@ -238,7 +238,7 @@ void board_reset_pd_mcu(void)
BOARD_TCPC_C1_RESET_POST_DELAY);
}
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
{
/*
* We ignore the cc_pin because the polarity should already be set
diff --git a/baseboard/intelrvp/baseboard.h b/baseboard/intelrvp/baseboard.h
index 7b24e594c8..b1535fa401 100644
--- a/baseboard/intelrvp/baseboard.h
+++ b/baseboard/intelrvp/baseboard.h
@@ -30,6 +30,7 @@
/* EC console commands */
#define CONFIG_CMD_CHARGER_DUMP
#define CONFIG_CMD_KEYBOARD
+#define CONFIG_CMD_USB_PD_CABLE
/* Port80 display */
#define CONFIG_MAX695X_SEVEN_SEGMENT_DISPLAY
@@ -206,6 +207,13 @@ struct tcpc_gpio_t {
uint8_t pin_pol;
};
+/* VCONN gpios */
+struct vconn_gpio_t {
+ enum gpio_signal cc1_pin;
+ enum gpio_signal cc2_pin;
+ uint8_t pin_pol;
+};
+
struct tcpc_gpio_config_t {
/* VBUS interrput */
struct tcpc_gpio_t vbus;
@@ -213,6 +221,10 @@ struct tcpc_gpio_config_t {
struct tcpc_gpio_t src;
/* Sink enable */
struct tcpc_gpio_t snk;
+#if defined(CONFIG_USBC_VCONN) && defined(CHIP_FAMILY_IT83XX)
+ /* Enable VCONN */
+ struct vconn_gpio_t vconn;
+#endif
};
extern const struct tcpc_gpio_config_t tcpc_gpios[];
diff --git a/baseboard/intelrvp/ite_ec.c b/baseboard/intelrvp/ite_ec.c
index 74ee7e3208..6906510ac6 100644
--- a/baseboard/intelrvp/ite_ec.c
+++ b/baseboard/intelrvp/ite_ec.c
@@ -96,3 +96,23 @@ const struct pwm_t pwm_channels[] = {
},
};
BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+#ifdef CONFIG_USBC_VCONN
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
+{
+ /*
+ * Setting VCONN low by disabling the power switch before
+ * enabling the VCONN on respective CC line
+ */
+ gpio_set_level(tcpc_gpios[port].vconn.cc1_pin,
+ !tcpc_gpios[port].vconn.pin_pol);
+ gpio_set_level(tcpc_gpios[port].vconn.cc2_pin,
+ !tcpc_gpios[port].vconn.pin_pol);
+
+ if (enabled)
+ gpio_set_level((cc_pin != USBPD_CC_PIN_1) ?
+ tcpc_gpios[port].vconn.cc2_pin :
+ tcpc_gpios[port].vconn.cc1_pin,
+ tcpc_gpios[port].vconn.pin_pol);
+}
+#endif
diff --git a/baseboard/intelrvp/ite_ec.h b/baseboard/intelrvp/ite_ec.h
index c233f1ef89..35014c0fd1 100644
--- a/baseboard/intelrvp/ite_ec.h
+++ b/baseboard/intelrvp/ite_ec.h
@@ -21,4 +21,9 @@
#define ADC_TEMP_SNS_SKIN_CHANNEL CHIP_ADC_CH6
#define ADC_TEMP_SNS_VR_CHANNEL CHIP_ADC_CH1
+#ifdef CONFIG_USBC_VCONN
+ #define CONFIG_USBC_VCONN_SWAP
+ /* delay to turn on/off vconn */
+ #define PD_VCONN_SWAP_DELAY 5000 /* us */
+#endif
#endif /* __CROS_EC_ITE_EC_H */
diff --git a/baseboard/octopus/variant_usbc_ec_tcpcs.c b/baseboard/octopus/variant_usbc_ec_tcpcs.c
index 408552e7fc..cd119acc80 100644
--- a/baseboard/octopus/variant_usbc_ec_tcpcs.c
+++ b/baseboard/octopus/variant_usbc_ec_tcpcs.c
@@ -142,7 +142,7 @@ void board_reset_pd_mcu(void)
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
}
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
{
/*
* We ignore the cc_pin because the polarity should already be set