diff options
| author | Jett Rink <jettrink@chromium.org> | 2018-09-14 08:28:01 -0600 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-09-17 21:34:54 -0700 |
| commit | 02155e0b650dff1969484d250b6f10e1b3018757 (patch) | |
| tree | 621991066255215a99b239dc2e3df4fe5fc59180 /baseboard | |
| parent | 1ceee0f64e386d3837ceab42044b838b4f0b2d68 (diff) | |
| download | chrome-ec-02155e0b650dff1969484d250b6f10e1b3018757.tar.gz | |
octopus: enable PSL for all NPCX variants
All NPCX variants support PSL mode in hardware now; enable this at the
baseboard level.
This is adding support for Bobba; other boards are unaffected
BRANCH=none
BUG=b:115677776
TEST=bobba goes into PSL
Change-Id: I38974371b101c42841e4f11ba72b466415c754d9
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1227050
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'baseboard')
| -rw-r--r-- | baseboard/octopus/baseboard.h | 3 | ||||
| -rw-r--r-- | baseboard/octopus/variant_ec_npcx796fb.c | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index e8160889eb..9311ab39ba 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -39,6 +39,9 @@ #define I2C_PORT_SENSOR NPCX_I2C_PORT7_0 #define I2C_ADDR_EEPROM 0xA0 + /* Enable PSL hibernate mode. */ + #define CONFIG_HIBERNATE_PSL + /* EC variant determines USB-C variant */ #define VARIANT_OCTOPUS_USBC_STANDALONE_TCPCS diff --git a/baseboard/octopus/variant_ec_npcx796fb.c b/baseboard/octopus/variant_ec_npcx796fb.c index 47fb14bfba..8d798fc5a7 100644 --- a/baseboard/octopus/variant_ec_npcx796fb.c +++ b/baseboard/octopus/variant_ec_npcx796fb.c @@ -20,10 +20,8 @@ const enum gpio_signal hibernate_wake_pins[] = { GPIO_LID_OPEN, GPIO_AC_PRESENT, GPIO_POWER_BUTTON_L, -#ifdef CONFIG_HIBERNATE_PSL - /* EC_RST_ODL needs to wake device if PSL hibernate mode is enabled. */ + /* EC_RST_ODL needs to wake device while in PSL hibernate. */ GPIO_EC_RST_ODL, -#endif }; const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); |