ADLRVP: Make code robust for validating TCPC vendors

Intel Reference Validation Platform is designed to test multiple
combinations of hardware thus help enable vendors seamlessly.
Added task based TCPC code enablement so that TCPC vendors can easily
hook their hardware, make the code changes and validate their TCPC.

BUG=none
BRANCH=none
TEST=make buildall -j

Change-Id: I989b6a35c6ff3f96150d09de11458886f9642d1f
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823167
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>

4 files changed, 26 insertions, 5 deletions

diff --git a/baseboard/intelrvp/adlrvp.c b/baseboard/intelrvp/adlrvp.c
index e6174d18a9..b8f7d71661 100644
--- a/baseboard/intelrvp/adlrvp.c
+++ b/baseboard/intelrvp/adlrvp.c
@@ -29,11 +29,13 @@ const struct tcpc_aic_gpio_config_t tcpc_aic_gpios[] = {
 		.ppc_alert = GPIO_USBC_TCPC_PPC_ALRT_P0,
 		.ppc_intr_handler = sn5s330_interrupt,
 	},
+#if defined(HAS_TASK_PD_C1)
 	[TYPE_C_PORT_1] = {
 		.tcpc_alert = GPIO_USBC_TCPC_ALRT_P1,
 		.ppc_alert = GPIO_USBC_TCPC_PPC_ALRT_P1,
 		.ppc_intr_handler = sn5s330_interrupt,
 	},
+#endif
 #if defined(HAS_TASK_PD_C2)
 	[TYPE_C_PORT_2] = {
 		.tcpc_alert = GPIO_USBC_TCPC_ALRT_P2,
@@ -58,11 +60,13 @@ struct ppc_config_t ppc_chips[] = {
 		.i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC,
 		.drv = &sn5s330_drv,
 	},
+#if defined(HAS_TASK_PD_C1)
 	[TYPE_C_PORT_1] = {
 		.i2c_port = I2C_PORT_TYPEC_1,
 		.i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC,
 		.drv = &sn5s330_drv
 	},
+#endif
 #if defined(HAS_TASK_PD_C2)
 	[TYPE_C_PORT_2] = {
 		.i2c_port = I2C_PORT_TYPEC_2,
@@ -87,11 +91,13 @@ struct usb_mux usbc0_tcss_usb_mux = {
 	.driver = &virtual_usb_mux_driver,
 	.hpd_update = &virtual_hpd_update,
 };
+#if defined(HAS_TASK_PD_C1)
 struct usb_mux usbc1_tcss_usb_mux = {
 	.usb_port = TYPE_C_PORT_1,
 	.driver = &virtual_usb_mux_driver,
 	.hpd_update = &virtual_hpd_update,
 };
+#endif
 #if defined(HAS_TASK_PD_C2)
 struct usb_mux usbc2_tcss_usb_mux = {
 	.usb_port = TYPE_C_PORT_2,
@@ -116,6 +122,7 @@ struct usb_mux usb_muxes[] = {
 		.i2c_port = I2C_PORT_TYPEC_0,
 		.i2c_addr_flags = I2C_PORT0_BB_RETIMER_ADDR,
 	},
+#if defined(HAS_TASK_PD_C1)
 	[TYPE_C_PORT_1] = {
 		.usb_port = TYPE_C_PORT_1,
 		.next_mux = &usbc1_tcss_usb_mux,
@@ -123,6 +130,7 @@ struct usb_mux usb_muxes[] = {
 		.i2c_port = I2C_PORT_TYPEC_1,
 		.i2c_addr_flags = I2C_PORT1_BB_RETIMER_ADDR,
 	},
+#endif
 #if defined(HAS_TASK_PD_C2)
 	[TYPE_C_PORT_2] = {
 		.usb_port = TYPE_C_PORT_2,
diff --git a/baseboard/intelrvp/adlrvp.h b/baseboard/intelrvp/adlrvp.h
index 9703a39bb2..f2e264e181 100644
--- a/baseboard/intelrvp/adlrvp.h
+++ b/baseboard/intelrvp/adlrvp.h
@@ -26,10 +26,14 @@
 #define CONFIG_CHIPSET_ALDERLAKE
 
 /* USB PD config */
-#if defined(HAS_TASK_PD_C2) && defined(HAS_TASK_PD_C3)
+#if defined(HAS_TASK_PD_C3)
 #define CONFIG_USB_PD_PORT_MAX_COUNT 4
-#else
+#elif defined(HAS_TASK_PD_C2)
+#define CONFIG_USB_PD_PORT_MAX_COUNT 3
+#elif defined(HAS_TASK_PD_C1)
 #define CONFIG_USB_PD_PORT_MAX_COUNT 2
+#else
+#define CONFIG_USB_PD_PORT_MAX_COUNT 1
 #endif
 #define CONFIG_USB_MUX_VIRTUAL
 #define PD_MAX_POWER_MW              100000
@@ -59,7 +63,9 @@
 /* Config BB retimer */
 #define CONFIG_USBC_RETIMER_INTEL_BB
 #define I2C_PORT0_BB_RETIMER_ADDR	0x56
+#if defined(HAS_TASK_PD_C1)
 #define I2C_PORT1_BB_RETIMER_ADDR	0x57
+#endif
 #if defined(HAS_TASK_PD_C2)
 #define I2C_PORT2_BB_RETIMER_ADDR	0x58
 #endif
@@ -110,7 +116,9 @@
 
 enum adlrvp_charge_ports {
 	TYPE_C_PORT_0,
+#if defined(HAS_TASK_PD_C1)
 	TYPE_C_PORT_1,
+#endif
 #if defined(HAS_TASK_PD_C2)
 	TYPE_C_PORT_2,
 #endif
diff --git a/baseboard/intelrvp/chg_usb_pd_mecc_1_0.c b/baseboard/intelrvp/chg_usb_pd_mecc_1_0.c
index 0fa9716b07..0c091efead 100644
--- a/baseboard/intelrvp/chg_usb_pd_mecc_1_0.c
+++ b/baseboard/intelrvp/chg_usb_pd_mecc_1_0.c
@@ -33,7 +33,8 @@ static void baseboard_tcpc_init(void)
 
 	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
 		/* Enable PPC interrupts. */
-		gpio_enable_interrupt(tcpc_aic_gpios[i].ppc_alert);
+		if (tcpc_aic_gpios[i].ppc_intr_handler)
+			gpio_enable_interrupt(tcpc_aic_gpios[i].ppc_alert);
 
 		/* Enable TCPC interrupts. */
 		if (tcpc_config[i].bus_type != EC_BUS_TYPE_EMBEDDED)
@@ -78,6 +79,9 @@ uint16_t tcpc_get_alert_status(void)
 
 int ppc_get_alert_status(int port)
 {
+	if (!tcpc_aic_gpios[port].ppc_intr_handler)
+		return 0;
+
 	return !gpio_get_level(tcpc_aic_gpios[port].ppc_alert);
 }
 
@@ -87,7 +91,8 @@ void ppc_interrupt(enum gpio_signal signal)
 	int i;
 
 	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
-		if (signal == tcpc_aic_gpios[i].ppc_alert) {
+		if (tcpc_aic_gpios[i].ppc_intr_handler &&
+			signal == tcpc_aic_gpios[i].ppc_alert) {
 			tcpc_aic_gpios[i].ppc_intr_handler(i);
 			break;
 		}
diff --git a/baseboard/intelrvp/ite_ec.c b/baseboard/intelrvp/ite_ec.c
index 9254a3b39b..d76d22bb63 100644
--- a/baseboard/intelrvp/ite_ec.c
+++ b/baseboard/intelrvp/ite_ec.c
@@ -130,7 +130,7 @@ const struct pwm_t pwm_channels[] = {
 };
 BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
 
-#ifdef CONFIG_USBC_VCONN
+#if defined(CONFIG_USBC_VCONN) && defined(CONFIG_USB_PD_TCPM_ITE_ON_CHIP)
 void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
 {
 #ifndef CONFIG_USBC_PPC_VCONN