diff options
author | Rob Barnes <robbarnes@google.com> | 2021-03-16 13:19:52 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-03-16 23:08:16 +0000 |
commit | 48619bb65774a6a6125826eec100ab173244afb8 (patch) | |
tree | 8222005df14cc93700c05e5718e9f88440baaae1 /baseboard/guybrush/baseboard.c | |
parent | d6d9d8df94eb427a64d46c04dde659cc8d378dff (diff) | |
download | chrome-ec-48619bb65774a6a6125826eec100ab173244afb8.tar.gz |
guybrush: Add 200ms delay between rsmrst and pwrbtn
Changing from 80ms to 200ms to allow more time for signals to settle
before pwrbtn. This delay is not documented in spec, so this may require
further tuning.
BUG=b:182802230
TEST=Build
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I79432b05c11c520fd49cb84c8e575f253b04a836
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764972
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'baseboard/guybrush/baseboard.c')
-rw-r--r-- | baseboard/guybrush/baseboard.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/baseboard/guybrush/baseboard.c b/baseboard/guybrush/baseboard.c index f901a29d58..ef3b72a384 100644 --- a/baseboard/guybrush/baseboard.c +++ b/baseboard/guybrush/baseboard.c @@ -884,16 +884,13 @@ int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) */ void board_pwrbtn_to_pch(int level) { - /* Add delay for G3 exit if asserting PWRBTN_L and S5_PGOOD is low. */ - if (!level && !gpio_get_level(GPIO_S5_PGOOD)) { - /* - * From measurement, wait 80 ms for RSMRST_L to rise after - * S5_PGOOD. - */ + /* Add delay for G3 exit if asserting PWRBTN_L and RSMRST_L is low. */ + if (!level && !gpio_get_level(GPIO_PCH_RSMRST_L)) { + /* Wait G3_TO_PWRBTN_DELAY_MS ms for RSMRST_L to rise */ msleep(G3_TO_PWRBTN_DELAY_MS); - if (!gpio_get_level(GPIO_S5_PGOOD)) - ccprints("Error: pwrbtn S5_PGOOD low"); + if (!gpio_get_level(GPIO_PCH_RSMRST_L)) + ccprints("Error pwrbtn: RSMRST_L still low"); } gpio_set_level(GPIO_PCH_PWRBTN_L, level); } |