summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorWai-Hong Tam <waihong@google.com>2018-09-10 04:34:14 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-09-13 06:14:12 -0700
commitab54765cf1c71d1f1a91ab08d68521b29d8fec76 (patch)
tree446a634c348c5de1575818248e4666237509bd1f
parent1918bb0ea138d9e3522e4f7ad6897a882c7cda50 (diff)
downloadchrome-ec-ab54765cf1c71d1f1a91ab08d68521b29d8fec76.tar.gz
cheza: Config the SPI flash size to 1MB
The NPCX7M7WB has 1MB internal SPI flash. Config it correctly. BRANCH=none BUG=b:114686845 TEST=Checked the EC image size is 1MB. Ran flashrom to flash EC. Change-Id: Ie0ed27f72019790cfeb283349ae28fd05dc9693a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215882 Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
-rw-r--r--board/cheza/board.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/cheza/board.h b/board/cheza/board.h
index 1bc0439def..990e83c670 100644
--- a/board/cheza/board.h
+++ b/board/cheza/board.h
@@ -26,7 +26,7 @@
#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
/* Internal SPI flash on NPCX7 */
-#define CONFIG_FLASH_SIZE (512 * 1024) /* It's really 1MB. */
+#define CONFIG_FLASH_SIZE (1024 * 1024) /* 1MB internal spi flash */
#define CONFIG_SPI_FLASH_REGS
#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */