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authorRandall Spangler <rspangler@chromium.org>2012-10-31 17:44:51 -0700
committerRandall Spangler <rspangler@chromium.org>2012-10-31 18:06:10 -0700
commit9a1548984d1bcfb6a2035110349af9e2e0f4531a (patch)
tree862ad62ce5d49717becb8a613c2c905f995d89ea
parentf3c88fa1ab60101f32f9117dced3afdc3f4c9393 (diff)
downloadchrome-ec-9a1548984d1bcfb6a2035110349af9e2e0f4531a.tar.gz
link: Cold reboot should ignore WAKE# pin
This fixes the EC not being able to do a cold reset while the power button is held down, because the power button asserts WAKE#. BUG=chrome-os-partner:15705 BRANCH=link TEST=manual - scope HIB# - hold down power button - from console, 'reboot cold' HIB# should stay asserted for 150ms. Before this fix, it asserted only briefly. Change-Id: I07c6bb5ee3f846544c75e7e0d4584f8434a9cd56 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/37090 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Puneet Kumar <puneetster@chromium.org>
-rw-r--r--chip/lm4/system.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/chip/lm4/system.c b/chip/lm4/system.c
index b998cb5e2d..b6e37ca0ec 100644
--- a/chip/lm4/system.c
+++ b/chip/lm4/system.c
@@ -233,7 +233,11 @@ static void hibernate(uint32_t seconds, uint32_t microseconds, uint32_t flags)
/* Set up wake reasons and hibernate flags */
hibctl = LM4_HIBERNATE_HIBCTL | LM4_HIBCTL_PINWEN;
- flags |= HIBDATA_WAKE_PIN;
+
+ if (flags & HIBDATA_WAKE_PIN)
+ hibctl |= LM4_HIBCTL_PINWEN;
+ else
+ hibctl &= ~LM4_HIBCTL_PINWEN;
if (seconds || microseconds) {
hibctl |= LM4_HIBCTL_RTCWEN;
@@ -285,7 +289,7 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds)
{
/* Flush console before hibernating */
cflush();
- hibernate(seconds, microseconds, 0);
+ hibernate(seconds, microseconds, HIBDATA_WAKE_PIN);
}
void system_pre_init(void)
@@ -366,7 +370,10 @@ void system_reset(int flags)
hibdata_write(HIBDATA_INDEX_SAVED_RESET_FLAGS, save_flags);
if (flags & SYSTEM_RESET_HARD) {
- /* Bounce through hibernate to trigger a hard reboot */
+ /*
+ * Bounce through hibernate to trigger a hard reboot. Do
+ * not wake on wake pin, since we need the full duration.
+ */
hibernate(0, HIB_RESET_USEC, HIBDATA_WAKE_HARD_RESET);
} else
CPU_NVIC_APINT = 0x05fa0004;