diff options
| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2015-08-28 18:24:40 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-03 18:02:22 -0700 |
| commit | 46493e49aa52af3d8d948dc1a75df3823b83541d (patch) | |
| tree | be19b91e7addacd7e64583e4d73dd4a1cf9fd881 | |
| parent | ab8cad32ee1537521ba49916a05d7b7e1fb2417c (diff) | |
| download | chrome-ec-46493e49aa52af3d8d948dc1a75df3823b83541d.tar.gz | |
Kunimitsu: Workaround for PMIC emergency shutdown
When the DUT enters to SOC G3 or rebooted, SLP_SUS assertion turns off the
A-rails which is causing the PMIC emergency shutdown. As a workaround this
patch disables the power fault in the PMIC register.
BUG=chrome-os-partner:44693
BRANCH=none
TEST=Manually tested on Kunimitsu FAB3.
- "reboot" from the EC console command works
- "ectool reboot_ec" from the Kernel terminal works
- "shutdown -h now" command from the Kernel terminal puts the device
in SoC G3 / PG3.
- cold reset from the servo board works
Change-Id: Id5e091ace876d7655f64e61cca4a9f0303b69604
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/297045
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
| -rw-r--r-- | board/kunimitsu/board.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/board/kunimitsu/board.c b/board/kunimitsu/board.c index ae2372b2b3..f14686a114 100644 --- a/board/kunimitsu/board.c +++ b/board/kunimitsu/board.c @@ -46,6 +46,8 @@ #define GPIO_KB_OUTPUT (GPIO_ODR_HIGH) #define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW) +#define TPS650830_I2C_ADDR 0x60 + /* Exchange status with PD MCU. */ static void pd_mcu_interrupt(enum gpio_signal signal) { @@ -310,6 +312,24 @@ const struct button_config buttons[CONFIG_BUTTON_COUNT] = { }; BUILD_ASSERT(ARRAY_SIZE(buttons) == CONFIG_BUTTON_COUNT); +/* Initialize PMIC */ +static void board_pmic_init(void) +{ + /* + * PWFAULT_MASK1 Register settings + * [2] : 1b V9 Power Fault Masked + * [0] : 1b V13 Power Fault Masked + */ + if (i2c_write8(I2C_PORT_PMIC, TPS650830_I2C_ADDR, 0xE5, 0x5)) + CPRINTS("PMIC write failed"); +} +/* + * TODO (crosbug.com/p/44821): Do the PMIC initialization soon after the I2C + * initialization is done. + * DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_INIT_I2C + 1); + */ +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_pmic_init, HOOK_PRIO_DEFAULT + 1); + /* Initialize board. */ static void board_init(void) { |