diff options
| author | Aseda Aboagye <aaboagye@google.com> | 2018-06-07 18:00:20 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-08 16:14:14 -0700 |
| commit | f39c9fb0466ab5729aeba13ec4a52079d561f03b (patch) | |
| tree | 89bb1670b6294192801b236bbefc64577b254ebc | |
| parent | 3846871131d40790efcc9467eb3cfa01b859969e (diff) | |
| download | chrome-ec-f39c9fb0466ab5729aeba13ec4a52079d561f03b.tar.gz | |
power: Add CONFIG_* option for PROCHOT polarity.
The common x86 chipset code assumed that CPU_PROCHOT was active high,
however on some boards it's actually active low. This commit simply
adds a CONFIG_* option, CONFIG_CPU_PROCHOT_IS_ACTIVE_LOW, and inverts
the places where the signal is used.
BUG=b:109882953
BRANCH=poppy
TEST=Enable on nocturne; flash, verify that CPU_PROCHOT is not asserted
by default.
Change-Id: I6d871e4979b79333cf4897d77c995eadbb34fd43
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1092150
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
| -rw-r--r-- | include/config.h | 5 | ||||
| -rw-r--r-- | power/braswell.c | 7 | ||||
| -rw-r--r-- | power/intel_x86.c | 7 | ||||
| -rw-r--r-- | power/stoney.c | 3 |
4 files changed, 22 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h index fe9e084261..b42a6e54d1 100644 --- a/include/config.h +++ b/include/config.h @@ -2325,6 +2325,11 @@ */ #undef CONFIG_PRINTF_LEGACY_LI_FORMAT +/* + * On x86 systems, define this option if the CPU_PROCHOT signal is active low. + */ +#undef CONFIG_CPU_PROCHOT_ACTIVE_LOW + /*****************************************************************************/ /* Support PWM control */ #undef CONFIG_PWM diff --git a/power/braswell.c b/power/braswell.c index 0b91040cbc..e04918c055 100644 --- a/power/braswell.c +++ b/power/braswell.c @@ -85,6 +85,9 @@ void chipset_reset(void) void chipset_throttle_cpu(int throttle) { +#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW + throttle = !throttle; +#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */ if (chipset_in_state(CHIPSET_STATE_ON)) gpio_set_level(GPIO_CPU_PROCHOT, throttle); } @@ -204,7 +207,11 @@ enum power_state power_handle_state(enum power_state state) * Throttle CPU if necessary. This should only be asserted * when +VCCP is powered (it is by now). */ +#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW + gpio_set_level(GPIO_CPU_PROCHOT, !throttle_cpu); +#else gpio_set_level(GPIO_CPU_PROCHOT, throttle_cpu); +#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */ /* Set SYS and CORE PWROK */ gpio_set_level(GPIO_PCH_SYS_PWROK, 1); diff --git a/power/intel_x86.c b/power/intel_x86.c index 7a2601c8ec..4617c91394 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -170,6 +170,9 @@ DECLARE_HOOK(HOOK_CHIPSET_RESET, handle_chipset_reset, HOOK_PRIO_FIRST); void chipset_throttle_cpu(int throttle) { +#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW + throttle = !throttle; +#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */ if (chipset_in_state(CHIPSET_STATE_ON)) gpio_set_level(GPIO_CPU_PROCHOT, throttle); } @@ -368,7 +371,11 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) * Throttle CPU if necessary. This should only be asserted * when +VCCP is powered (it is by now). */ +#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW + gpio_set_level(GPIO_CPU_PROCHOT, 1); +#else gpio_set_level(GPIO_CPU_PROCHOT, 0); +#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */ return POWER_S0; diff --git a/power/stoney.c b/power/stoney.c index 8ebf2f168b..e1b766ab2e 100644 --- a/power/stoney.c +++ b/power/stoney.c @@ -71,6 +71,9 @@ void chipset_reset(void) void chipset_throttle_cpu(int throttle) { CPRINTS("%s(%d)", __func__, throttle); +#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW + throttle = !throttle; +#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */ if (chipset_in_state(CHIPSET_STATE_ON)) gpio_set_level(GPIO_CPU_PROCHOT, throttle); } |