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authorDino Li <Dino.Li@ite.com.tw>2021-03-29 18:31:37 +0800
committerCommit Bot <commit-bot@chromium.org>2021-04-07 02:50:27 +0000
commitadcaef75c457970dc5b17e8bf5a2346302836832 (patch)
tree23c70c4f4be0321065b8431a3eeca6c8c72a8e1b
parent19dcdf2830ae424f7d24c828002fa133a7b7b38d (diff)
downloadchrome-ec-adcaef75c457970dc5b17e8bf5a2346302836832.tar.gz
it8xxx2: add support option CONFIG_PRESERVE_LOGS
On it8xxx2 chips, assert WRST# to reset itself will clear memory content to default value, this is a HW mechanism. So if CONFIG_PRESERVE_LOGS and CONFIG_IT83XX_HARD_RESET_BY_GPG1 are enabled at the same time, we have to save EC logs into flash before reset. We will restore logs from flash on the next initialization before jumping to main routine. BUG=b:183899510, b:183466169 BRANCH=none TEST=1) __image_size is same as ec.RW.bin size. 2) buildall. 3) manually verify reboot, poweroff, and sysjump from AP console: localhost ~ # ectool uptimeinfo EC uptime: 64.755 seconds AP resets since EC boot: 0 Most recent AP reset causes: EC reset flags at last EC boot: reset-pin | power-on localhost ~ # reboot ... localhost ~ # ectool uptimeinfo EC uptime: 19.334 seconds AP resets since EC boot: 0 Most recent AP reset causes: 71.609: reset: at AP's request EC reset flags at last EC boot: reset-pin | power-on | hard localhost ~ # poweroff ... localhost ~ # ectool uptimeinfo EC uptime: 20.627 seconds AP resets since EC boot: 0 Most recent AP reset causes: 71.609: reset: at AP's request 32.149: reset: at AP's request EC reset flags at last EC boot: reset-pin | power-on | hard localhost ~ # ectool reboot_ec RW localhost ~ # ectool uptimeinfo EC uptime: 37.998 seconds AP resets since EC boot: 0 Most recent AP reset causes: 71.609: reset: at AP's request 32.149: reset: at AP's request EC reset flags at last EC boot: reset-pin | power-on | sysjump | hard localhost ~ # Change-Id: I76b5f172b7728dc5ce9bf3a965cb7b2d638f8fc3 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2794322 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
-rw-r--r--baseboard/kukui/baseboard.h2
-rw-r--r--chip/it83xx/config_chip_it8xxx2.h13
-rw-r--r--chip/it83xx/registers.h11
-rw-r--r--chip/it83xx/system.c20
-rw-r--r--common/uart_buffering.c5
-rw-r--r--core/riscv-rv32i/ec.lds.S19
-rw-r--r--include/config.h4
-rw-r--r--include/link_defs.h3
8 files changed, 73 insertions, 4 deletions
diff --git a/baseboard/kukui/baseboard.h b/baseboard/kukui/baseboard.h
index ba3fb45bfc..9aa1362534 100644
--- a/baseboard/kukui/baseboard.h
+++ b/baseboard/kukui/baseboard.h
@@ -162,6 +162,7 @@
#define CONFIG_FORCE_CONSOLE_RESUME
#define CONFIG_HOST_COMMAND_STATUS
#define CONFIG_CMD_AP_RESET_LOG
+#define CONFIG_PRESERVE_LOGS
/* Required for FAFT */
#define CONFIG_CMD_BUTTON
@@ -256,7 +257,6 @@
#define CPU_CLOCK 48000000
#undef CONFIG_HIBERNATE
-#define CONFIG_PRESERVE_LOGS
#define CONFIG_SPI_MASTER
#define CONFIG_STM_HWTIMER32
#define CONFIG_WATCHDOG_HELP
diff --git a/chip/it83xx/config_chip_it8xxx2.h b/chip/it83xx/config_chip_it8xxx2.h
index 2934ec65dc..52c5a88c7e 100644
--- a/chip/it83xx/config_chip_it8xxx2.h
+++ b/chip/it83xx/config_chip_it8xxx2.h
@@ -137,4 +137,17 @@
#define CHIP_H2RAM_BASE (CONFIG_RAM_BASE + 0x1000) /* base+1000h~base+1FFF */
#define CHIP_RAMCODE_BASE (CONFIG_RAM_BASE + 0x2000) /* base+2000h~base+2FFF */
+#ifdef BASEBOARD_KUKUI
+/*
+ * Reserved 0x80000~0xfffff 512kb on flash for saving EC logs (8kb space is
+ * enough to save the logs). This configuration reduces EC FW binary size to
+ * 512kb. With this config, we still have 4x kb space on RO and 6x kb space on
+ * RW.
+ */
+#define CHIP_FLASH_PRESERVE_LOGS_BASE 0x80000
+#define CHIP_FLASH_PRESERVE_LOGS_SIZE 0x2000
+#undef CONFIG_FLASH_SIZE_BYTES
+#define CONFIG_FLASH_SIZE_BYTES CHIP_FLASH_PRESERVE_LOGS_BASE
+#endif
+
#endif /* __CROS_EC_CONFIG_CHIP_IT8XXX2_H */
diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h
index c1066666b3..95e8ed548f 100644
--- a/chip/it83xx/registers.h
+++ b/chip/it83xx/registers.h
@@ -1451,7 +1451,10 @@ enum bram_indices {
BRAM_IDX_SCRATCHPAD2 = 0xa,
BRAM_IDX_SCRATCHPAD3 = 0xb,
- /* offset 0x0c ~ 0x1f are reserved for future use. */
+ /* EC logs status */
+ BRAM_IDX_EC_LOG_STATUS = 0xc,
+
+ /* offset 0x0d ~ 0x1f are reserved for future use. */
#if defined(CONFIG_HOSTCMD_LPC) || defined(CONFIG_HOSTCMD_ESPI)
/*
* offset 0x20 ~ 0x7b are reserved for future use.
@@ -1488,6 +1491,12 @@ enum bram_indices {
#define BRAM_SCRATCHPAD2 IT83XX_BRAM_BANK0(BRAM_IDX_SCRATCHPAD2)
#define BRAM_SCRATCHPAD3 IT83XX_BRAM_BANK0(BRAM_IDX_SCRATCHPAD3)
+#define BRAM_EC_LOG_STATUS IT83XX_BRAM_BANK0(BRAM_IDX_EC_LOG_STATUS)
+enum bram_ec_logs_status {
+ EC_LOG_SAVED_IN_FLASH = 1,
+ EC_LOG_SAVED_IN_MEMORY
+};
+
#define BRAM_VALID_FLAGS0 IT83XX_BRAM_BANK0(BRAM_IDX_VALID_FLAGS0)
#define BRAM_VALID_FLAGS1 IT83XX_BRAM_BANK0(BRAM_IDX_VALID_FLAGS1)
#define BRAM_VALID_FLAGS2 IT83XX_BRAM_BANK0(BRAM_IDX_VALID_FLAGS2)
diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c
index 25907d1191..2f6fbd504b 100644
--- a/chip/it83xx/system.c
+++ b/chip/it83xx/system.c
@@ -13,6 +13,7 @@
#include "hooks.h"
#include "host_command.h"
#include "intc.h"
+#include "link_defs.h"
#include "registers.h"
#include "system.h"
#include "task.h"
@@ -260,6 +261,16 @@ void chip_bram_valid(void)
BRAM_VALID_FLAGS2 = BRAM_VALID_MAGIC_FIELD2;
BRAM_VALID_FLAGS3 = BRAM_VALID_MAGIC_FIELD3;
}
+
+#if defined(CONFIG_PRESERVE_LOGS) && defined(CONFIG_IT83XX_HARD_RESET_BY_GPG1)
+ if (BRAM_EC_LOG_STATUS == EC_LOG_SAVED_IN_FLASH) {
+ /* Restore EC logs from flash. */
+ memcpy((void *)__preserved_logs_start,
+ (const void *)CHIP_FLASH_PRESERVE_LOGS_BASE,
+ (uintptr_t)__preserved_logs_size);
+ }
+ BRAM_EC_LOG_STATUS = 0;
+#endif
}
void system_pre_init(void)
@@ -296,6 +307,15 @@ void system_reset(int flags)
cflush();
}
+#if defined(CONFIG_PRESERVE_LOGS) && defined(CONFIG_IT83XX_HARD_RESET_BY_GPG1)
+ /* Saving EC logs into flash before reset. */
+ flash_physical_erase(CHIP_FLASH_PRESERVE_LOGS_BASE,
+ CHIP_FLASH_PRESERVE_LOGS_SIZE);
+ flash_physical_write(CHIP_FLASH_PRESERVE_LOGS_BASE,
+ (uintptr_t)__preserved_logs_size, __preserved_logs_start);
+ BRAM_EC_LOG_STATUS = EC_LOG_SAVED_IN_FLASH;
+#endif
+
/* Disable interrupts to avoid task swaps during reboot. */
interrupt_disable();
diff --git a/common/uart_buffering.c b/common/uart_buffering.c
index 78dc06e5f4..677c72a718 100644
--- a/common/uart_buffering.c
+++ b/common/uart_buffering.c
@@ -65,6 +65,11 @@ void uart_init_buffer(void)
if (tx_checksum != uart_buffer_calc_checksum() ||
!IN_RANGE(tx_buf_head, 0, CONFIG_UART_TX_BUF_SIZE) ||
!IN_RANGE(tx_buf_tail, 0, CONFIG_UART_TX_BUF_SIZE)) {
+ /*
+ * NOTE:
+ * We are here because EC cold reset or RO/RW's preserve_logs
+ * section are different.
+ */
tx_buf_head = 0;
tx_buf_tail = 0;
tx_checksum = 0;
diff --git a/core/riscv-rv32i/ec.lds.S b/core/riscv-rv32i/ec.lds.S
index 109fe7c579..80d1208a69 100644
--- a/core/riscv-rv32i/ec.lds.S
+++ b/core/riscv-rv32i/ec.lds.S
@@ -271,6 +271,25 @@ SECTIONS
__data_lma_start = .;
+#ifdef CONFIG_PRESERVE_LOGS
+ .preserve_logs(NOLOAD) : {
+ /*
+ * The address of the preserved logs is fixed at the beginning
+ * of memory.
+ */
+ . = ALIGN(8);
+ __preserved_logs_start = .;
+ *(SORT(.preserved_logs.*))
+ . = ALIGN(8);
+ __preserved_logs_end = .;
+ } > IRAM
+ __preserved_logs_size = __preserved_logs_end - __preserved_logs_start;
+#ifdef CONFIG_IT83XX_HARD_RESET_BY_GPG1
+ ASSERT(__preserved_logs_size <= CHIP_FLASH_PRESERVE_LOGS_SIZE,
+ "Not enough flash space to save EC logs.")
+#endif
+#endif /* CONFIG_PRESERVE_LOGS */
+
.data : {
. = ALIGN(4);
__data_start = .;
diff --git a/include/config.h b/include/config.h
index 8e7db9af9c..283d8ff7fb 100644
--- a/include/config.h
+++ b/include/config.h
@@ -3953,8 +3953,8 @@
#undef CONFIG_UART_PAD_SWITCH
/**
- * This will only be used for Kukui and cortex-m0. Preserve EC reset logs and
- * console logs on SRAM so that the logs will be preserved after EC shutting
+ * This will only be used for Kukui. Preserve EC reset logs and console
+ * logs on SRAM/FLASH so that the logs will be preserved after EC shutting
* down or sysjumped. It will keep the contents across EC resets, so we have
* more information about system states. The contents on SRAM will be cleared
* when checksum or validity check fails.
diff --git a/include/link_defs.h b/include/link_defs.h
index f18c52a45c..79b1a99159 100644
--- a/include/link_defs.h
+++ b/include/link_defs.h
@@ -148,6 +148,9 @@ extern void *__dram_bss_end;
#ifdef CONFIG_PRESERVE_LOGS
#define __preserved_logs(name) \
__attribute__((section(".preserved_logs." STRINGIFY(name))))
+/* preserved_logs section. */
+extern const char __preserved_logs_start[];
+extern const char __preserved_logs_size[];
#else
#define __preserved_logs(name)
#endif