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authorKyoung Kim <kyoung.il.kim@intel.com>2018-12-14 19:12:11 -0800
committerchrome-bot <chrome-bot@chromium.org>2018-12-20 10:03:51 -0800
commitfd13a286bc99cc2e56e3ef1bb82fcdb63734985a (patch)
tree09aa1012ee705ebda1ecb97dc68216d1c34761fd
parenta6f0a7e96c6fe9da398f7db5004d7d2b9c00e3e3 (diff)
downloadchrome-ec-fd13a286bc99cc2e56e3ef1bb82fcdb63734985a.tar.gz
core/minute-ia: enable cache
Enable cache CR0.CD and CR0.NW Trackpad frame processing improved with cache on. BUG=b:120885570 TEST=check overall performance improvement including TP frame processing. Change-Id: I18d27b28255d5775c71b7562e18a1d102ee35feb Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1378659 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
-rw-r--r--core/minute-ia/init.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/core/minute-ia/init.S b/core/minute-ia/init.S
index 67340f343c..7639b31e2b 100644
--- a/core/minute-ia/init.S
+++ b/core/minute-ia/init.S
@@ -8,6 +8,10 @@
#include "config.h"
#include "interrupts.h"
+ .equ CR0_NW, (1 << 29)
+ .equ CR0_CD, (1 << 30)
+
+
.global __idt
# GDT is loaded by ISH ROM. The FW code retains the same GDT
@@ -348,6 +352,11 @@ reset:
# Load IDT
lidt __idt_ptr
+ # Enable cache (CR0)
+ movl %cr0, %eax
+ andl $~(CR0_CD | CR0_NW), %eax
+ movl %eax, %cr0
+
# Reset Task-Switched flag to prevent an ESC instruction such
# as fninit, from triggering a Device-not-available fault
clts