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| author | Rong Chang <rongchang@chromium.org> | 2018-09-05 16:42:08 -0400 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-12-18 08:27:04 -0800 |
| commit | 59364c835d14689c55e66551cd48c668814541df (patch) | |
| tree | ea9c69c36b8cebede2785e4be0b6ee71d2c6d270 | |
| parent | 9f4852b7e9bbceb1fadb04eb68da43037f0b09d5 (diff) | |
| download | chrome-ec-59364c835d14689c55e66551cd48c668814541df.tar.gz | |
core/cortex-m: Support chip with no flash.
Linker script verifies flash size and layout when generating firmware
binary. This configuration macro removes FLASH section and asserts.
BRANCH=none
BUG=b:114326670
TEST=make buildall -j
Change-Id: I3c9ce6f930260d780839e52b45055f88cc22f85f
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1208771
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
| -rw-r--r-- | core/cortex-m/ec.lds.S | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index 87c8b3ae7a..dabdedf860 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -24,6 +24,9 @@ OUTPUT_ARCH(BFD_ARCH) ENTRY(reset) MEMORY { +#if !defined(CONFIG_FLASH_PHYSICAL) + IRAM (rwx) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE +#else #if defined(SECTION_IS_RO) && defined(NPCX_RO_HEADER) /* * Header structure used by npcx booter in RO region. @@ -40,8 +43,9 @@ MEMORY #ifdef CONFIG_SHAREDLIB SHARED_LIB (rx) : ORIGIN = FW_OFF(SHAREDLIB), LENGTH = FW_SIZE(SHAREDLIB) #endif - IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE +#endif /* !CONFIG_FLASH_PHYSICAL */ + #ifdef CONFIG_EXTERNAL_STORAGE #ifdef CONFIG_REPLACE_LOADER_WITH_BSS_SLOW LDR_REGION(rw) : \ @@ -109,7 +113,11 @@ SECTIONS __flash_lplfw_end = .; } > CDRAM AT > FLASH #else +#if !defined(CONFIG_FLASH_PHYSICAL) + } > IRAM +#else } > FLASH +#endif /* !CONFIG_FLASH_PHYSICAL */ #endif . = ALIGN(4); .rodata : { @@ -250,7 +258,9 @@ SECTIONS KEEP(*(.google)) #endif . = ALIGN(4); -#ifdef CONFIG_EXTERNAL_STORAGE +#if !defined(CONFIG_FLASH_PHYSICAL) + } > IRAM +#elif defined(CONFIG_EXTERNAL_STORAGE) } > CDRAM AT > FLASH #else } > FLASH @@ -373,6 +383,8 @@ SECTIONS * explicit ASSERT afterwards will cause the linker to abort if we use too * much. */ __hey_flash_used = LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION); + +#ifdef CONFIG_FLASH_PHYSICAL ASSERT((FW_SIZE(SECTION) #if defined(CONFIG_RWSIG) && defined(SECTION_IS_RO) - CONFIG_RO_PUBKEY_SIZE @@ -382,6 +394,7 @@ SECTIONS #endif ) >= (LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION)), "No room left in the flash") +#endif /* CONFIG_FLASH_PHYSICAL */ #if defined(SECTION_IS_RO) && defined(NPCX_RO_HEADER) __image_size = __hey_flash_used - FW_SIZE(RO_HDR); |