diff options
| author | Furquan Shaikh <furquan@google.com> | 2018-06-19 08:27:57 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-19 19:11:05 -0700 |
| commit | d85ce46bfc674cd61b90230b0b26b64ab988ecb7 (patch) | |
| tree | c20c68f1a7b56ede511fbb9b5d778aacf4a7fdc8 | |
| parent | 02ebdbdd6b5aeee371974cc6bcbd8d6504210ea5 (diff) | |
| download | chrome-ec-d85ce46bfc674cd61b90230b0b26b64ab988ecb7.tar.gz | |
yorp: Program PWM3 alternate function based on board version
GPIO80 is used for ENTERING_RW signal on V0 whereas it is used as an
alternate function for KB_BL_PWM on V1+. Configuring the alternate
function in gpio.inc breaks V0 boards w.r.t. ENTERING_RW signal. This
change moves the configuration of alternate function for PWM3 to
update_drivers_from_board_id.
BUG=b:110084012
BRANCH=None
TEST=Verified that firmware_DevMode passes.
Change-Id: I82bf5df685d40981b70767008dafbe76ccb20ddf
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1106289
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
| -rw-r--r-- | board/yorp/board.c | 6 | ||||
| -rw-r--r-- | board/yorp/gpio.inc | 8 |
2 files changed, 13 insertions, 1 deletions
diff --git a/board/yorp/board.c b/board/yorp/board.c index f51ebab20b..a2cf80976a 100644 --- a/board/yorp/board.c +++ b/board/yorp/board.c @@ -290,6 +290,12 @@ static void update_drivers_from_board_id(void) reset_gpio_flags(GPIO_USB_A1_CHARGE_EN_L, GPIO_OUT_HIGH); reset_gpio_flags(GPIO_USB2_OTG_ID_V1, GPIO_OUT_LOW); reset_gpio_flags(GPIO_WFCAM_VSYNC, GPIO_INPUT); + + /* + * Configure alternate mode to enable PWM3 that is required for + * KB_BL_PWM. + */ + gpio_set_alternate_function(GPIO_8, 0x1, 0); } } DECLARE_HOOK(HOOK_INIT, update_drivers_from_board_id, HOOK_PRIO_INIT_I2C + 1); diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc index d1098f755c..a616c48f88 100644 --- a/board/yorp/gpio.inc +++ b/board/yorp/gpio.inc @@ -153,4 +153,10 @@ ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* I2C3 */ ALTERNATE(PIN_MASK(F, 0x0C), 0, MODULE_I2C, 0) /* I2C4 */ ALTERNATE(PIN_MASK(B, 0x0C), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* 1.8V I2C7 */ ALTERNATE(PIN_MASK(4, 0x30), 0, MODULE_ADC, 0) /* ADC0-1 */ -ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* PWM3: KB_BL_PWM */ + +/* + * PWM3 needs to be configured for KB_BL_PWM on board versions >= 1. However, on + * version 0, GPIO80 is used for ENTERING_RW signal and PWM alternate function + * should be configured depending upon the board version. Hence, it is done in + * update_drivers_from_board_id() in board.c file. + */ |