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authorAlec Berg <alecaberg@chromium.org>2013-11-08 09:41:45 -0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2013-11-09 04:39:00 +0000
commitb2a2821b4d00e91b3514eb4aaa3461eeb0555e6c (patch)
tree47aa46422f8b7ca37134958b1769df1dfe9a35cd
parent308e02195d2ae9c71ea41512a08b2c17babf482e (diff)
downloadchrome-ec-b2a2821b4d00e91b3514eb4aaa3461eeb0555e6c.tar.gz
rambi: Add low power idle to rambi
Added low power idle functionality to rambi but left it off by default. To turn it on, define CONFIG_LOW_POWER_IDLE in rambi's board.h file. BRANCH=none BUG=chrome-os-partner:23947 TEST=Verified that the EC does not go into deep sleep when in S0, and that it does go into deep sleep in S3, S5, and G3. Tested to make sure that flashec works when the EC is in low speed deep sleep. Also verified that the EC console times out after the timeout period and that it wakes up on the next command. Did not measure power usage. Change-Id: I0ab1a2dc7ca7ae4577fe5d0894c1bf82205dfea6 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176159 Reviewed-by: Todd Broch <tbroch@chromium.org>
-rw-r--r--board/rambi/board.c19
-rw-r--r--board/rambi/board.h2
-rw-r--r--power/baytrail.c15
3 files changed, 31 insertions, 5 deletions
diff --git a/board/rambi/board.c b/board/rambi/board.c
index 845797139b..d20229ec5c 100644
--- a/board/rambi/board.c
+++ b/board/rambi/board.c
@@ -14,6 +14,7 @@
#include "gpio.h"
#include "host_command.h"
#include "i2c.h"
+#include "jtag.h"
#include "keyboard_scan.h"
#include "lid_switch.h"
#include "peci.h"
@@ -26,20 +27,23 @@
#include "temp_sensor_chip.h"
#include "thermal.h"
#include "timer.h"
+#include "uart.h"
#include "util.h"
/* GPIO signal list. Must match order from enum gpio_signal. */
const struct gpio_info gpio_list[] = {
/* Inputs with interrupt handlers are first for efficiency */
- {"POWER_BUTTON_L", LM4_GPIO_A, (1<<2), GPIO_INT_BOTH,
+ {"POWER_BUTTON_L", LM4_GPIO_A, (1<<2), GPIO_INT_BOTH_DSLEEP,
power_button_interrupt},
- {"LID_OPEN", LM4_GPIO_A, (1<<3), GPIO_INT_BOTH,
+ {"LID_OPEN", LM4_GPIO_A, (1<<3), GPIO_INT_BOTH_DSLEEP,
lid_interrupt},
- {"AC_PRESENT", LM4_GPIO_H, (1<<3), GPIO_INT_BOTH,
+ {"AC_PRESENT", LM4_GPIO_H, (1<<3), GPIO_INT_BOTH_DSLEEP,
extpower_interrupt},
- {"PCH_SLP_S3_L", LM4_GPIO_G, (1<<7), GPIO_INT_BOTH|GPIO_PULL_UP,
+ {"PCH_SLP_S3_L", LM4_GPIO_G, (1<<7), GPIO_INT_BOTH_DSLEEP |
+ GPIO_PULL_UP,
x86_interrupt},
- {"PCH_SLP_S4_L", LM4_GPIO_H, (1<<1), GPIO_INT_BOTH|GPIO_PULL_UP,
+ {"PCH_SLP_S4_L", LM4_GPIO_H, (1<<1), GPIO_INT_BOTH_DSLEEP |
+ GPIO_PULL_UP,
x86_interrupt},
{"PP1050_PGOOD", LM4_GPIO_H, (1<<4), GPIO_INT_BOTH,
x86_interrupt},
@@ -53,6 +57,11 @@ const struct gpio_info gpio_list[] = {
x86_interrupt},
{"WP_L", LM4_GPIO_A, (1<<4), GPIO_INT_BOTH,
switch_interrupt},
+ {"JTAG_TCK", LM4_GPIO_C, (1<<0), GPIO_DEFAULT,
+ jtag_interrupt},
+ {"UART0_RX", LM4_GPIO_A, (1<<0), GPIO_INT_BOTH_DSLEEP |
+ GPIO_PULL_UP,
+ uart_deepsleep_interrupt},
/* Other inputs */
{"BOARD_VERSION1", LM4_GPIO_Q, (1<<5), GPIO_INPUT, NULL},
diff --git a/board/rambi/board.h b/board/rambi/board.h
index 8412a5535e..34ed193823 100644
--- a/board/rambi/board.h
+++ b/board/rambi/board.h
@@ -71,6 +71,8 @@ enum gpio_signal {
GPIO_S5_PGOOD, /* Power good on S5 supplies */
GPIO_VCORE_PGOOD, /* Power good on core VR */
GPIO_WP_L, /* Write protect input */
+ GPIO_JTAG_TCK, /* JTAG clock input */
+ GPIO_UART0_RX, /* UART0 RX input */
/* Other inputs */
GPIO_BOARD_VERSION1, /* Board version stuffing resistor 1 */
diff --git a/power/baytrail.c b/power/baytrail.c
index 9ca1633a2f..3f7f217f24 100644
--- a/power/baytrail.c
+++ b/power/baytrail.c
@@ -113,6 +113,9 @@ enum x86_state x86_chipset_init(void)
*/
if (system_jumped_to_this_image()) {
if ((x86_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
+ /* Disable idle task deep sleep when in S0. */
+ disable_sleep(SLEEP_MASK_AP_RUN);
+
CPRINTF("[%T x86 already in S0]\n");
return X86_S0;
} else {
@@ -266,6 +269,12 @@ enum x86_state x86_handle_state(enum x86_state state)
/* Call hooks now that rails are up */
hook_notify(HOOK_CHIPSET_RESUME);
+ /*
+ * Disable idle task deep sleep. This means that the low
+ * power idle task will not go into deep sleep while in S0.
+ */
+ disable_sleep(SLEEP_MASK_AP_RUN);
+
/* Wait 100ms after all voltages good */
msleep(100);
@@ -298,6 +307,12 @@ enum x86_state x86_handle_state(enum x86_state state)
wireless_enable(0);
/*
+ * Enable idle task deep sleep. Allow the low power idle task
+ * to go into deep sleep in S3 or lower.
+ */
+ enable_sleep(SLEEP_MASK_AP_RUN);
+
+ /*
* Deassert prochot since CPU is off and we're about to drop
* +VCCP.
*/