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| author | CHLin <CHLIN56@nuvoton.com> | 2017-07-12 14:21:42 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-16 08:14:53 -0700 |
| commit | c721060be197e0b93ae1a054a7176be73dfa875b (patch) | |
| tree | aa6efa0b96329bcb0df6af3d28c08dbab7e773ab | |
| parent | febb4381c1b8d2730e13d8e8605e178da4413919 (diff) | |
| download | chrome-ec-c721060be197e0b93ae1a054a7176be73dfa875b.tar.gz | |
npcx: Add support for chip variant npcx7m6g
This CL adds CHIP_VARIANT_NPCX7M6G to support another npcx7 ec SKU.
Please note that the default setting in npcx7_evb is npcx7m6f.
For the EVB using the 128-pins EC package, please change CHIP_VARIANT
from npcx7m6f to npcx7m6g in build.mk.
BRANCH=none
BUG=none
TEST=No build errors for make buildall; Set CHIP_VARIANT=npcx7m6g in
board/npcx7_evb/build.mk; Build the image and test on EVB.
Change-Id: I2f857e4f6524eab45930bac3cc209409d4a53ee8
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/569320
Commit-Ready: Jun Lin <riverq@gmail.com>
Tested-by: Jun Lin <riverq@gmail.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
| -rw-r--r-- | chip/npcx/config_chip-npcx7.h | 4 | ||||
| -rw-r--r-- | chip/npcx/config_flash_layout.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/chip/npcx/config_chip-npcx7.h b/chip/npcx/config_chip-npcx7.h index 54b5feca6b..1ccc2c64cb 100644 --- a/chip/npcx/config_chip-npcx7.h +++ b/chip/npcx/config_chip-npcx7.h @@ -45,7 +45,7 @@ /* no low power ram in npcx7 series */ /* Use chip variant to specify the size and start address of program memory */ -#if defined(CHIP_VARIANT_NPCX7M6F) +#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6G) /* 62KB data ram */ #define CONFIG_RAM_SIZE (0x00010000 - NPCX_BTRAM_SIZE) /* 192KB RAM for FW code */ @@ -59,7 +59,7 @@ /* Total RAM size checking for npcx ec */ #define NPCX_RAM_SIZE (NPCX_BTRAM_SIZE + CONFIG_RAM_SIZE + \ NPCX_PROGRAM_MEMORY_SIZE) -#if defined(CHIP_VARIANT_NPCX7M6F) +#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6G) /* 256KB RAM in NPCX7M6F */ #if (NPCX_RAM_SIZE != 0x40000) #error "Wrong memory mapping layout for NPCX7M6F" diff --git a/chip/npcx/config_flash_layout.h b/chip/npcx/config_flash_layout.h index 602bdbdc5e..46215655c7 100644 --- a/chip/npcx/config_flash_layout.h +++ b/chip/npcx/config_flash_layout.h @@ -30,7 +30,7 @@ #define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x40000 #define CONFIG_EC_WRITABLE_STORAGE_OFF 0x40000 #define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x40000 -#elif defined(CHIP_VARIANT_NPCX7M6F) +#elif defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6G) #define CONFIG_EC_PROTECTED_STORAGE_OFF 0 #define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x40000 #define CONFIG_EC_WRITABLE_STORAGE_OFF 0x40000 |