diff options
| author | Rong Chang <rongchang@google.com> | 2017-02-06 19:05:56 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-04-26 11:25:58 -0700 |
| commit | 9807e01760cef5c0f5e158f59c0bf36b063916ed (patch) | |
| tree | 626544b8b3a140c4ea2f967f056ddaef0edc520f | |
| parent | 3e68c64dfd7be4e5819bdc3ff9019cc5718c9f02 (diff) | |
| download | chrome-ec-9807e01760cef5c0f5e158f59c0bf36b063916ed.tar.gz | |
rose: add stm32f4 SPI master support
This change adds stm32f4 stream DMA support and a config option to use
first SPI port as master.
BUG=chromium:688979
TEST=build and load on stm32f4 dev board
BRANCH=none
Change-Id: I2b504be70e0fbb17f16ce070119ae4715c88333a
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/438911
Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org>
Tested-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | chip/stm32/registers.h | 11 | ||||
| -rw-r--r-- | chip/stm32/spi_master.c | 30 | ||||
| -rw-r--r-- | include/config.h | 3 |
3 files changed, 43 insertions, 1 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h index f0bd1cf861..2126312e96 100644 --- a/chip/stm32/registers.h +++ b/chip/stm32/registers.h @@ -1788,6 +1788,12 @@ enum dma_channel { STM32_DMAC_FMPI2C4_TX = STM32_DMA1_STREAM5, STM32_DMAC_FMPI2C4_RX = STM32_DMA1_STREAM2, + /* Legacy naming for spi_master.c */ + STM32_DMAC_SPI1_TX = STM32_DMA2_STREAM3, /* REQ 3 */ + STM32_DMAC_SPI1_RX = STM32_DMA2_STREAM0, /* REQ 3 */ + STM32_DMAC_SPI2_TX = STM32_DMA1_STREAM4, /* REQ 0 */ + STM32_DMAC_SPI2_RX = STM32_DMA1_STREAM3, /* REQ 0 */ + }; #define STM32_REQ_USART1_TX 4 @@ -1808,6 +1814,11 @@ enum dma_channel { #define STM32_FMPI2C4_TX_REQ_CH 2 #define STM32_FMPI2C4_RX_REQ_CH 2 +#define STM32_SPI1_TX_REQ_CH 3 +#define STM32_SPI1_RX_REQ_CH 3 +#define STM32_SPI2_TX_REQ_CH 0 +#define STM32_SPI2_RX_REQ_CH 0 + #define STM32_DMAS_TOTAL_COUNT 16 /* Registers for a single stream of a DMA controller */ diff --git a/chip/stm32/spi_master.c b/chip/stm32/spi_master.c index 3d7fd070b2..cc064b9d23 100644 --- a/chip/stm32/spi_master.c +++ b/chip/stm32/spi_master.c @@ -18,6 +18,9 @@ /* The second (and third if available) SPI port are used as master */ static stm32_spi_regs_t *SPI_REGS[] = { +#ifdef CONFIG_STM32_SPI1_MASTER + STM32_SPI1_REGS, +#endif STM32_SPI2_REGS, #if defined(CHIP_VARIANT_STM32F373) || defined(CHIP_FAMILY_STM32L4) STM32_SPI3_REGS, @@ -27,6 +30,9 @@ static stm32_spi_regs_t *SPI_REGS[] = { #ifdef CHIP_FAMILY_STM32L4 /* DMA request mapping on channels */ static uint8_t dma_req[ARRAY_SIZE(SPI_REGS)] = { +#ifdef CONFIG_STM32_SPI1_MASTER + /* SPI1 */ 1, +#endif /* SPI2 */ 1, /* SPI3 */ 3, }; @@ -37,10 +43,24 @@ static struct mutex spi_mutex[ARRAY_SIZE(SPI_REGS)]; #define SPI_TRANSACTION_TIMEOUT_USEC (800 * MSEC) /* Default DMA channel options */ +#ifdef CHIP_FAMILY_STM32F4 +#define F4_CHANNEL(ch) STM32_DMA_CCR_CHANNEL(ch) +#else +#define F4_CHANNEL(ch) 0 +#endif + static const struct dma_option dma_tx_option[] = { +#ifdef CONFIG_STM32_SPI1_MASTER + { + STM32_DMAC_SPI1_TX, (void *)&STM32_SPI1_REGS->dr, + STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT + | F4_CHANNEL(STM32_SPI1_TX_REQ_CH) + }, +#endif { STM32_DMAC_SPI2_TX, (void *)&STM32_SPI2_REGS->dr, STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT + | F4_CHANNEL(STM32_SPI2_TX_REQ_CH) }, #if defined(CHIP_VARIANT_STM32F373) || defined(CHIP_FAMILY_STM32L4) { @@ -51,9 +71,17 @@ static const struct dma_option dma_tx_option[] = { }; static const struct dma_option dma_rx_option[] = { +#ifdef CONFIG_STM32_SPI1_MASTER + { + STM32_DMAC_SPI1_RX, (void *)&STM32_SPI1_REGS->dr, + STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT + | F4_CHANNEL(STM32_SPI1_RX_REQ_CH) + }, +#endif { STM32_DMAC_SPI2_RX, (void *)&STM32_SPI2_REGS->dr, STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT + | F4_CHANNEL(STM32_SPI2_RX_REQ_CH) }, #if defined(CHIP_VARIANT_STM32F373) || defined(CHIP_FAMILY_STM32L4) { @@ -156,7 +184,7 @@ int spi_enable(int port, int enable) static int spi_dma_start(int port, const uint8_t *txdata, uint8_t *rxdata, int len) { - stm32_dma_chan_t *txdma; + dma_chan_t *txdma; /* Set up RX DMA */ dma_start_rx(&dma_rx_option[port], len, rxdata); diff --git a/include/config.h b/include/config.h index a0877d2097..3a989294ee 100644 --- a/include/config.h +++ b/include/config.h @@ -1961,6 +1961,9 @@ /* SPI master feature */ #undef CONFIG_SPI_MASTER +/* Support STM32 SPI1 as master. */ +#undef CONFIG_STM32_SPI1_MASTER + /* SPI master configure gpios on init */ #undef CONFIG_SPI_MASTER_CONFIGURE_GPIOS |