diff options
| author | Rong Chang <rongchang@chromium.org> | 2017-02-11 11:34:59 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-03-14 00:40:06 -0700 |
| commit | 2ed1cb0517e62f0169e151b7721dbe5fc7246103 (patch) | |
| tree | 2bfc435323c9880b5e080c6aa7a8ce051eab6d14 | |
| parent | 9b2fe6349f7030a3c99381fce6968d35489eb911 (diff) | |
| download | chrome-ec-2ed1cb0517e62f0169e151b7721dbe5fc7246103.tar.gz | |
rowan: fix SPI2 reset sequence and chip select ALT function
EC controls SPI CS pin as GPIO. This CL remove the ALT function
config. And before trigger SPI hardware reset, the driver state needs to
be disable.
BUG=chrome-os-partner:62673
TEST=manual
load into Rowan and boot up AP.
check console command accelread
BRANCH=none
Change-Id: I511c5906efbbb42b09547c61414bcc24b0217ad3
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441485
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
| -rw-r--r-- | board/rowan/board.c | 1 | ||||
| -rw-r--r-- | board/rowan/gpio.inc | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/board/rowan/board.c b/board/rowan/board.c index f6ba2147cf..e31f4b736a 100644 --- a/board/rowan/board.c +++ b/board/rowan/board.c @@ -430,6 +430,7 @@ static void board_chipset_pre_init(void) STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; /* Reset SPI2 */ + spi_enable(CONFIG_SPI_ACCEL_PORT, 0); STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; diff --git a/board/rowan/gpio.inc b/board/rowan/gpio.inc index b73eb72c05..d87bbac522 100644 --- a/board/rowan/gpio.inc +++ b/board/rowan/gpio.inc @@ -71,4 +71,4 @@ ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, 0) /* USART1: PA9/PA10 */ ALTERNATE(PIN_MASK(B, 0x00c0), 1, MODULE_I2C, 0) /* I2C MASTER:PB6/7 */ ALTERNATE(PIN_MASK(A, 0x1800), 5, MODULE_I2C, 0) /* I2C MASTER:PA11/12 */ ALTERNATE(PIN_MASK(A, 0x00f0), 0, MODULE_SPI, 0) /* SPI SLAVE:PA4/5/6/7 */ -ALTERNATE(PIN_MASK(B, 0xf000), 0, MODULE_SPI_MASTER, 0) /* SPI MASTER:PB12/13/14/15 */ +ALTERNATE(PIN_MASK(B, 0xe000), 0, MODULE_SPI_MASTER, 0) /* SPI MASTER:PB13/14/15 */ |