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authorTodd Broch <tbroch@chromium.org>2017-04-05 21:32:25 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-04-07 03:36:02 -0700
commit672bffb2b34cdeb6d259794132c34d25e8e07a79 (patch)
tree882f8ef448526f5817d84cd864697db543f37502
parente3f5e6bf6ad2d1e2c283a75cf08e17155633e0a5 (diff)
downloadchrome-ec-672bffb2b34cdeb6d259794132c34d25e8e07a79.tar.gz
eve_fp: tri-state pins connected to PCH during S3.
There's leakage through EC_INT when in S3 to the APs P3300_A rail. Changing the GPIO config to be an input all EC_INT and all the SPI slave pins during S3 removes the leakage. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=none BUG=b:35648259 TEST=on Eve, run int_test before & after suspend/resume successfully. Change-Id: I68e286c4770831544bea0d58ffa98185fd7ba788 Reviewed-on: https://chromium-review.googlesource.com/469527 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
-rw-r--r--board/eve_fp/board.c30
-rw-r--r--board/eve_fp/gpio.inc10
2 files changed, 32 insertions, 8 deletions
diff --git a/board/eve_fp/board.c b/board/eve_fp/board.c
index 3390dbb359..94ae0daade 100644
--- a/board/eve_fp/board.c
+++ b/board/eve_fp/board.c
@@ -10,12 +10,32 @@
#include "host_command.h"
#include "spi.h"
#include "system.h"
+#include "task.h"
#include "registers.h"
-#include "gpio_list.h"
-
#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
+static void ap_deferred(void)
+{
+ if (gpio_get_level(GPIO_SLP_S3_L)) {
+ /* S0 */
+ gpio_set_flags(GPIO_EC_INT_L, GPIO_ODR_HIGH | GPIO_PULL_UP);
+ hook_notify(HOOK_CHIPSET_RESUME);
+ } else {
+ /* S3 */
+ gpio_set_flags(GPIO_EC_INT_L, GPIO_INPUT);
+ hook_notify(HOOK_CHIPSET_SUSPEND);
+ }
+}
+DECLARE_DEFERRED(ap_deferred);
+
+void slp_event(enum gpio_signal signal)
+{
+ hook_call_deferred(&ap_deferred_data, 0);
+}
+
+#include "gpio_list.h"
+
/* SPI devices */
const struct spi_device_t spi_devices[] = {
/* Fingerprint sensor */
@@ -31,8 +51,10 @@ static void board_init(void)
/* Enable clocks to SPI3 module (master) */
STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI3;
- /* we are ready for host transactions */
- hook_notify(HOOK_CHIPSET_RESUME);
+ /* Enable interrupt on SLP_S3_L */
+ gpio_enable_interrupt(GPIO_SLP_S3_L);
+ /* enable the SPI slave interface if the PCH is up */
+ hook_call_deferred(&ap_deferred_data, 0);
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
diff --git a/board/eve_fp/gpio.inc b/board/eve_fp/gpio.inc
index 930b35ab24..370efed4cf 100644
--- a/board/eve_fp/gpio.inc
+++ b/board/eve_fp/gpio.inc
@@ -7,16 +7,18 @@
/* Declare symbolic names for all the GPIOs that we care about.
* Note: Those with interrupt handlers must be declared first. */
GPIO_INT(FPS_INT, PIN(A, 2), GPIO_INT_RISING, fps_event)
-GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INT_BOTH | GPIO_PULL_UP, spi_event)
+GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INPUT, spi_event)
+GPIO_INT(SLP_S3_L, PIN(A, 11), GPIO_INT_BOTH, slp_event)
/* Outputs */
-GPIO(EC_INT_L, PIN(A, 1), GPIO_ODR_HIGH | GPIO_PULL_UP)
+GPIO(EC_INT_L, PIN(A, 1), GPIO_INPUT) /* Enabled when PCH is up */
GPIO(FP_RST_ODL, PIN(A, 3), GPIO_ODR_LOW)
GPIO(SPI3_NSS, PIN(A, 15), GPIO_OUT_HIGH)
-/* Unimplemented signals which we need to emulate for now */
+GPIO(WP_L, PIN(B, 7), GPIO_INPUT)
+
+/* Unimplemented signals which we need to emulate */
UNIMPLEMENTED(ENTERING_RW)
-UNIMPLEMENTED(WP_L)
/* USART1: PA9/10 */
ALTERNATE(PIN_MASK(A, 0x0600), GPIO_ALT_F7, MODULE_UART, 0)