diff options
| author | Martin Roth <martinroth@chromium.org> | 2016-10-25 09:41:23 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-11-15 17:41:56 -0800 |
| commit | b3bc41c2fee610151f838d720f8538950a16f342 (patch) | |
| tree | 36cfba64176d861252c511aa3d283f64893a8454 | |
| parent | 651f8b9acd6a692fa21fa6e0891fffd240522d89 (diff) | |
| download | chrome-ec-b3bc41c2fee610151f838d720f8538950a16f342.tar.gz | |
util/ecst: Fix misspelling in #defines
This should be 'default'
BUG=None
BRANCH=None
TEST=make buildall passes
Change-Id: I58a960ed48f8ea42529682cef4d99c98ac1aa2dc
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403419
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
| -rwxr-xr-x | util/ecst.c | 6 | ||||
| -rwxr-xr-x | util/ecst.h | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/util/ecst.c b/util/ecst.c index 9a6632c71a..7c8371ef4f 100755 --- a/util/ecst.c +++ b/util/ecst.c @@ -96,15 +96,15 @@ int main(int argc, char *argv[]) /* Set default values */ g_calc_type = CALC_TYPE_NONE; - bin_params.spi_max_clk = SPI_MAX_CLOCK_DEAFULT; - bin_params.spi_read_mode = SPI_READ_MODE_DEAFULT; + bin_params.spi_max_clk = SPI_MAX_CLOCK_DEFAULT; + bin_params.spi_read_mode = SPI_READ_MODE_DEFAULT; bin_params.fw_load_addr = chip_info[NPCX5M5G].ram_addr; bin_params.fw_ep = chip_info[NPCX5M5G].ram_addr; bin_params.fw_err_detec_s_addr = FW_CRC_START_ADDR; bin_params.fw_err_detec_e_addr = FW_CRC_START_ADDR; - bin_params.flash_size = FLASH_SIZE_DEAFULT; + bin_params.flash_size = FLASH_SIZE_DEFAULT; bin_params.fw_hdr_offset = 0; ptr_fw_addr = 0x00000000; diff --git a/util/ecst.h b/util/ecst.h index d61f95be3b..ede4f1bfa2 100755 --- a/util/ecst.h +++ b/util/ecst.h @@ -142,10 +142,10 @@ #define FLASH_SIZE_8_MBYTES 0x0F #define FLASH_SIZE_16_MBYTES 0x1F -/* Header fields deafult values. */ -#define SPI_MAX_CLOCK_DEAFULT SPI_MAX_CLOCK_20_MHZ_VAL -#define SPI_READ_MODE_DEAFULT SPI_NORMAL_MODE -#define FLASH_SIZE_DEAFULT FLASH_SIZE_16_MBYTES_VAL +/* Header fields default values. */ +#define SPI_MAX_CLOCK_DEFAULT SPI_MAX_CLOCK_20_MHZ_VAL +#define SPI_READ_MODE_DEFAULT SPI_NORMAL_MODE +#define FLASH_SIZE_DEFAULT FLASH_SIZE_16_MBYTES_VAL #define FW_CRC_START_ADDR 0x00000000 #define ADDR_16_BYTES_ALIGNED_MASK 0x0000000F |