eve: Add new board

Add support for eve P0 board with:

- chip: npcx
- pmic: bd999992GW
- charger: bd99956
- tcpc: 2x anx3429

BUG=chrome-os-partner:58666
BRANCH=none
TEST=build and boot on eve board

Change-Id: I69ff246e9f8197d5d50241e6a8fa4796f4c9bfda
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/400638

8 files changed, 1487 insertions, 0 deletions

diff --git a/board/eve/battery.c b/board/eve/battery.c
new file mode 100644
index 0000000000..1f953fe568
--- /dev/null
+++ b/board/eve/battery.c
@@ -0,0 +1,139 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Placeholder values for temporary battery pack.
+ */
+
+#include "battery.h"
+#include "battery_smart.h"
+#include "charge_state.h"
+#include "console.h"
+#include "ec_commands.h"
+#include "extpower.h"
+#include "util.h"
+
+/* Shutdown mode parameter to write to manufacturer access register */
+#define SB_SHUTDOWN_DATA	0x0010
+
+/* Battery info for proto */
+static const struct battery_info info = {
+	.voltage_max		= 8800,	/* mV */
+	.voltage_normal		= 7700,
+	.voltage_min		= 6000,
+	.precharge_current	= 64,	/* mA */
+	.start_charging_min_c	= 0,
+	.start_charging_max_c	= 46,
+	.charging_min_c		= 0,
+	.charging_max_c		= 60,
+	.discharging_min_c	= 0,
+	.discharging_max_c	= 60,
+};
+
+const struct battery_info *battery_get_info(void)
+{
+	return &info;
+}
+
+int board_cut_off_battery(void)
+{
+	int rv;
+
+	/* Ship mode command must be sent twice to take effect */
+	rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
+	if (rv != EC_SUCCESS)
+		return EC_RES_ERROR;
+
+	rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
+	return rv ? EC_RES_ERROR : EC_RES_SUCCESS;
+}
+
+enum battery_disconnect_state battery_get_disconnect_state(void)
+{
+	uint8_t data[6];
+	int rv;
+
+	/*
+	 * Take note if we find that the battery isn't in disconnect state,
+	 * and always return NOT_DISCONNECTED without probing the battery.
+	 * This assumes the battery will not go to disconnect state during
+	 * runtime.
+	 */
+	static int not_disconnected;
+
+	if (not_disconnected)
+		return BATTERY_NOT_DISCONNECTED;
+
+	if (extpower_is_present()) {
+		/* Check if battery charging + discharging is disabled. */
+		rv = sb_write(SB_MANUFACTURER_ACCESS,
+			      PARAM_OPERATION_STATUS);
+		if (rv)
+			return BATTERY_DISCONNECT_ERROR;
+
+		rv = sb_read_string(I2C_PORT_BATTERY, BATTERY_ADDR,
+				    SB_ALT_MANUFACTURER_ACCESS, data, 6);
+
+		if (rv || (~data[3] & (BATTERY_DISCHARGING_DISABLED |
+				       BATTERY_CHARGING_DISABLED))) {
+			not_disconnected = 1;
+			return BATTERY_NOT_DISCONNECTED;
+		}
+
+		/*
+		 * Battery is neither charging nor discharging. Verify that
+		 * we didn't enter this state due to a safety fault.
+		 */
+		rv = sb_write(SB_MANUFACTURER_ACCESS, PARAM_SAFETY_STATUS);
+		if (rv)
+			return BATTERY_DISCONNECT_ERROR;
+
+		rv = sb_read_string(I2C_PORT_BATTERY, BATTERY_ADDR,
+				    SB_ALT_MANUFACTURER_ACCESS, data, 6);
+
+		if (rv || data[2] || data[3] || data[4] || data[5])
+			return BATTERY_DISCONNECT_ERROR;
+
+		/*
+		 * Battery is present and also the status is initialized and
+		 * no safety fault, battery is disconnected.
+		 */
+		if (battery_is_present() == BP_YES)
+			return BATTERY_DISCONNECTED;
+	}
+	not_disconnected = 1;
+	return BATTERY_NOT_DISCONNECTED;
+}
+
+int charger_profile_override(struct charge_state_data *curr)
+{
+	const struct battery_info *batt_info;
+	/* battery temp in 0.1 deg C */
+	int bat_temp_c = curr->batt.temperature - 2731;
+
+	batt_info = battery_get_info();
+	/* Don't charge if outside of allowable temperature range */
+	if (bat_temp_c >= batt_info->charging_max_c * 10 ||
+	    bat_temp_c < batt_info->charging_min_c * 10) {
+		curr->requested_current = 0;
+		curr->requested_voltage = 0;
+		curr->batt.flags &= ~BATT_FLAG_WANT_CHARGE;
+		curr->state = ST_IDLE;
+	}
+	return 0;
+}
+
+/* Customs options controllable by host command. */
+#define PARAM_FASTCHARGE (CS_PARAM_CUSTOM_PROFILE_MIN + 0)
+
+enum ec_status charger_profile_override_get_param(uint32_t param,
+						  uint32_t *value)
+{
+	return EC_RES_INVALID_PARAM;
+}
+
+enum ec_status charger_profile_override_set_param(uint32_t param,
+						  uint32_t value)
+{
+	return EC_RES_INVALID_PARAM;
+}
diff --git a/board/eve/board.c b/board/eve/board.c
new file mode 100644
index 0000000000..51cd515cbc
--- /dev/null
+++ b/board/eve/board.c
@@ -0,0 +1,574 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Eve board-specific configuration */
+
+#include "adc_chip.h"
+#include "als.h"
+#include "bd99992gw.h"
+#include "board_config.h"
+#include "button.h"
+#include "charge_manager.h"
+#include "charge_state.h"
+#include "charge_ramp.h"
+#include "charger.h"
+#include "chipset.h"
+#include "console.h"
+#include "driver/als_isl29035.h"
+#include "driver/charger/bd9995x.h"
+#include "driver/tcpm/anx74xx.h"
+#include "driver/tcpm/tcpci.h"
+#include "driver/tcpm/tcpm.h"
+#include "driver/temp_sensor/bd99992gw.h"
+#include "extpower.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "i2c.h"
+#include "keyboard_scan.h"
+#include "lid_switch.h"
+#include "math_util.h"
+#include "power.h"
+#include "power_button.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "spi.h"
+#include "switch.h"
+#include "system.h"
+#include "task.h"
+#include "temp_sensor.h"
+#include "timer.h"
+#include "uart.h"
+#include "usb_charge.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usb_pd_tcpm.h"
+#include "util.h"
+#include "espi.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+static void tcpc_alert_event(enum gpio_signal signal)
+{
+	if ((signal == GPIO_USB_C0_PD_INT_ODL) &&
+	    !gpio_get_level(GPIO_USB_C0_PD_RST_L))
+		return;
+	else if ((signal == GPIO_USB_C1_PD_INT_ODL) &&
+		 !gpio_get_level(GPIO_USB_C1_PD_RST_L))
+		return;
+
+#ifdef HAS_TASK_PDCMD
+	/* Exchange status with TCPCs */
+	host_command_pd_send_status(PD_CHARGE_NO_CHANGE);
+#endif
+}
+
+/*
+ * enable_input_devices() is called by the tablet_mode ISR, but changes the
+ * state of GPIOs, so its definition must reside after including gpio_list.
+ */
+static void enable_input_devices(void);
+DECLARE_DEFERRED(enable_input_devices);
+
+void tablet_mode_interrupt(enum gpio_signal signal)
+{
+	hook_call_deferred(&enable_input_devices_data, 0);
+}
+
+#include "gpio_list.h"
+
+/* power signal list.  Must match order of enum power_signal. */
+const struct power_signal_info power_signal_list[] = {
+	{GPIO_PCH_SLP_S0_L,	1, "SLP_S0_DEASSERTED"},
+	{VW_SLP_S3_L,		1, "SLP_S3_DEASSERTED"},
+	{VW_SLP_S4_L,		1, "SLP_S4_DEASSERTED"},
+	{GPIO_PCH_SLP_SUS_L,	1, "SLP_SUS_DEASSERTED"},
+	{GPIO_RSMRST_L_PGOOD,	1, "RSMRST_L_PGOOD"},
+	{GPIO_PMIC_DPWROK,	1, "PMIC_DPWROK"},
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
+
+/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
+const struct pwm_t pwm_channels[] = {
+	[PWM_CH_KBLIGHT] = { 5, PWM_CONFIG_DSLEEP, 100 },
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+/* Hibernate wake configuration */
+const enum gpio_signal hibernate_wake_pins[] = {
+	GPIO_AC_PRESENT,
+	GPIO_LID_OPEN,
+	GPIO_POWER_BUTTON_L,
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
+
+/* I2C port map */
+const struct i2c_port_t i2c_ports[]  = {
+	{"tcpc0",     I2C_PORT_TCPC0,   400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA},
+	{"tcpc1",     I2C_PORT_TCPC1,   400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA},
+	{"accelgyro", I2C_PORT_GYRO,    400, GPIO_I2C1_SCL,   GPIO_I2C1_SDA},
+	{"sensors",   I2C_PORT_ACCEL,   400, GPIO_I2C2_SCL,   GPIO_I2C2_SDA},
+	{"batt",      I2C_PORT_BATTERY, 100, GPIO_I2C3_SCL,   GPIO_I2C3_SDA},
+};
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+/* TCPC mux configuration */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
+	{I2C_PORT_TCPC0, 0x50, &anx74xx_tcpm_drv, TCPC_ALERT_ACTIVE_LOW},
+	{I2C_PORT_TCPC1, 0x50, &anx74xx_tcpm_drv, TCPC_ALERT_ACTIVE_LOW},
+};
+
+struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
+	{
+		.port_addr = 0,
+		.driver = &anx74xx_tcpm_usb_mux_driver,
+		.hpd_update = &anx74xx_tcpc_update_hpd_status,
+	},
+	{
+		.port_addr = 1,
+		.driver = &anx74xx_tcpm_usb_mux_driver,
+		.hpd_update = &anx74xx_tcpc_update_hpd_status,
+	},
+};
+
+/* called from anx74xx_set_power_mode() */
+void board_set_tcpc_power_mode(int port, int mode)
+{
+	switch (port) {
+	case 0:
+		if (mode) {
+			gpio_set_level(GPIO_USB_C0_TCPC_PWR, 1);
+			msleep(10);
+			gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
+		} else {
+			gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
+			msleep(1);
+			gpio_set_level(GPIO_USB_C0_TCPC_PWR, 0);
+		}
+		break;
+	case 1:
+		if (mode) {
+			gpio_set_level(GPIO_USB_C1_TCPC_PWR, 1);
+			msleep(10);
+			gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
+		} else {
+			gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
+			msleep(1);
+			gpio_set_level(GPIO_USB_C1_TCPC_PWR, 0);
+		}
+		break;
+	}
+}
+
+#ifdef CONFIG_USB_PD_TCPC_FW_VERSION
+void board_print_tcpc_fw_version(int port)
+{
+	int version;
+
+	if (!anx74xx_tcpc_get_fw_version(port, &version))
+		CPRINTS("TCPC p%d FW VER: 0x%x", port, version);
+}
+#endif
+
+void board_reset_pd_mcu(void)
+{
+	/* Assert reset */
+	gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
+	gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
+	msleep(1);
+	/* Disable power */
+	gpio_set_level(GPIO_USB_C0_TCPC_PWR, 0);
+	gpio_set_level(GPIO_USB_C1_TCPC_PWR, 0);
+	msleep(10);
+	/* Enable power */
+	gpio_set_level(GPIO_USB_C0_TCPC_PWR, 1);
+	gpio_set_level(GPIO_USB_C1_TCPC_PWR, 1);
+	msleep(10);
+	/* Deassert reset */
+	gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
+	gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
+}
+
+void board_tcpc_init(void)
+{
+	/* Only reset TCPC if not sysjump */
+	if (!system_jumped_to_this_image())
+		board_reset_pd_mcu();
+
+	/* Enable TCPC interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL);
+}
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C+1);
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+
+	if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) {
+		if (gpio_get_level(GPIO_USB_C0_PD_RST_L))
+			status |= PD_STATUS_TCPC_ALERT_0;
+	}
+
+	if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) {
+		if (gpio_get_level(GPIO_USB_C1_PD_RST_L))
+			status |= PD_STATUS_TCPC_ALERT_1;
+	}
+
+	return status;
+}
+
+const struct temp_sensor_t temp_sensors[] = {
+	{"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_get_battery_temp, 0, 4},
+
+	/* These BD99992GW temp sensors are only readable in S0 */
+	{"Ambient", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
+	 BD99992GW_ADC_CHANNEL_SYSTHERM0, 4},
+	{"Charger", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
+	 BD99992GW_ADC_CHANNEL_SYSTHERM1, 4},
+	{"DRAM", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
+	 BD99992GW_ADC_CHANNEL_SYSTHERM2, 4},
+	{"eMMC", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
+	 BD99992GW_ADC_CHANNEL_SYSTHERM3, 4},
+};
+BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
+
+/* ALS instances. Must be in same order as enum als_id. */
+struct als_t als[] = {
+	{"ISL", isl29035_init, isl29035_read_lux, 5},
+};
+BUILD_ASSERT(ARRAY_SIZE(als) == ALS_COUNT);
+
+const struct button_config buttons[CONFIG_BUTTON_COUNT] = {
+	{"Volume Down", KEYBOARD_BUTTON_VOLUME_DOWN, GPIO_VOLUME_DOWN_L,
+	 30 * MSEC, 0},
+	{"Volume Up", KEYBOARD_BUTTON_VOLUME_UP, GPIO_VOLUME_UP_L,
+	 30 * MSEC, 0},
+};
+
+static void board_pmic_init(void)
+{
+	if (system_jumped_to_this_image())
+		return;
+
+	/* DISCHGCNT3 - enable 100 ohm discharge on V1.00A */
+	i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3e, 0x04);
+
+	/* Set CSDECAYEN / VCCIO decays to 0V at assertion of SLP_S0# */
+	i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x30, 0x4a);
+
+	/*
+	 * Set V100ACNT / V1.00A Control Register:
+	 * Nominal output = 1.0V.
+	 */
+	i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x1a);
+
+	/*
+	 * Set V085ACNT / V0.85A Control Register:
+	 * Lower power mode = 0.7V.
+	 * Nominal output = 1.0V.
+	 */
+	i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x7a);
+
+	/* VRMODECTRL - disable low-power mode for all rails */
+	i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3b, 0x1f);
+}
+DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT);
+
+/* Initialize board. */
+static void board_init(void)
+{
+	/* Enable tablet mode interrupt for input device enable */
+	gpio_enable_interrupt(GPIO_TABLET_MODE_L);
+
+	/* Enable charger interrupts */
+	gpio_enable_interrupt(GPIO_CHARGER_INT_L);
+
+	/* Provide AC status to the PCH */
+	gpio_set_level(GPIO_PCH_ACOK, extpower_is_present());
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+#define MP2949_PAGE_SELECT	0x00	/* Select rail/page */
+#define MP2949_STORE_USER_ALL	0x15	/* Write settings to EEPROM */
+#define MP2949_MFR_TRANS_FAST	0xfa	/* Slew rate control */
+#define MP2949_FIXED_SLEW_RATE	0x0ac5	/* 40mV/uS */
+
+/*
+ * Workaround for P0 boards:
+ * Set voltage slew rate to 40mV/uS for all rails
+ */
+void board_before_rsmrst(int rsmrst)
+{
+	int rail, rate;
+	int fixed = 0;
+
+	/* Only trigger on RSMRST# deassertion */
+	if (!rsmrst)
+		return;
+
+	/* Only apply workaround to P0 boards */
+	if (system_get_board_version() != BOARD_VERSION_P0)
+		return;
+
+	i2c_lock(I2C_PORT_MP2949, 1);
+
+	for (rail = 2; rail >= 0; rail--) {
+		uint8_t buf[3];
+
+		/* Select register page for this rail */
+		buf[0] = MP2949_PAGE_SELECT;
+		buf[1] = rail;
+		i2c_xfer(I2C_PORT_MP2949, I2C_ADDR_MP2949,
+			 buf, 2, NULL, 0, I2C_XFER_SINGLE);
+
+		/* Check for workaround already applied */
+		buf[0] = MP2949_MFR_TRANS_FAST;
+		i2c_xfer(I2C_PORT_MP2949, I2C_ADDR_MP2949,
+			 buf, 1, buf+1, 2, I2C_XFER_SINGLE);
+		rate = ((int)buf[2] << 8) | buf[1];
+
+		if (rate == MP2949_FIXED_SLEW_RATE)
+			continue;
+		fixed = 1;
+
+		/* Set slew rate */
+		buf[0] = MP2949_MFR_TRANS_FAST;
+		buf[1] = MP2949_FIXED_SLEW_RATE & 0xff;
+		buf[2] = (MP2949_FIXED_SLEW_RATE >> 8) & 0xff;
+		i2c_xfer(I2C_PORT_MP2949, I2C_ADDR_MP2949,
+			 buf, 3, NULL, 0, I2C_XFER_SINGLE);
+
+		/* Store new settings (1 byte write, no data) */
+		buf[0] = MP2949_STORE_USER_ALL;
+		i2c_xfer(I2C_PORT_MP2949, I2C_ADDR_MP2949,
+			 buf, 1, NULL, 0, I2C_XFER_SINGLE);
+	}
+
+	i2c_lock(I2C_PORT_MP2949, 0);
+
+	CPRINTS("P0 board - IMVP8 workaround %sapplied",
+		fixed ? "" : "already ");
+}
+
+/**
+ * Buffer the AC present GPIO to the PCH.
+ */
+static void board_extpower(void)
+{
+	gpio_set_level(GPIO_PCH_ACOK, extpower_is_present());
+}
+DECLARE_HOOK(HOOK_AC_CHANGE, board_extpower, HOOK_PRIO_DEFAULT);
+
+int pd_snk_is_vbus_provided(int port)
+{
+	enum bd9995x_charge_port bd9995x_port;
+
+	switch (port) {
+	case 0:
+	case 1:
+		bd9995x_port = bd9995x_pd_port_to_chg_port(port);
+		break;
+	default:
+		panic("Invalid charge port\n");
+		break;
+	}
+
+	return bd9995x_is_vbus_provided(bd9995x_port);
+}
+
+/**
+ * Set active charge port -- only one port can be active at a time.
+ *
+ * @param charge_port   Charge port to enable.
+ *
+ * Returns EC_SUCCESS if charge port is accepted and made active,
+ * EC_ERROR_* otherwise.
+ */
+int board_set_active_charge_port(int charge_port)
+{
+	enum bd9995x_charge_port bd9995x_port;
+	static int initialized;
+
+	/* charge port is a physical port */
+	int is_real_port = (charge_port >= 0 &&
+			    charge_port < CONFIG_USB_PD_PORT_COUNT);
+	/* check if we are source VBUS on the port */
+	int source = gpio_get_level(charge_port == 0 ? GPIO_USB_C0_5V_EN :
+						       GPIO_USB_C1_5V_EN);
+
+	if (is_real_port && source) {
+		CPRINTF("Skip enable p%d", charge_port);
+		return EC_ERROR_INVAL;
+	}
+
+	/*
+	 * Reject charge port disable if our battery is critical and we
+	 * have yet to initialize a charge port - continue to charge using
+	 * charger ROM / POR settings.
+	 */
+	if (!initialized &&
+	    charge_port == CHARGE_PORT_NONE &&
+	    charge_get_percent() < 2)
+		return -1;
+
+	CPRINTS("New chg p%d", charge_port);
+
+	switch (charge_port) {
+	case 0:
+	case 1:
+		bd9995x_port = bd9995x_pd_port_to_chg_port(charge_port);
+		break;
+	case CHARGE_PORT_NONE:
+		bd9995x_port = BD9995X_CHARGE_PORT_NONE;
+		break;
+	default:
+		panic("Invalid charge port\n");
+		break;
+	}
+
+	initialized = 1;
+
+	return bd9995x_select_input_port(bd9995x_port);
+}
+
+/**
+ * Set the charge limit based upon desired maximum.
+ *
+ * @param port          Port number.
+ * @param supplier      Charge supplier type.
+ * @param charge_ma     Desired charge limit (mA).
+ */
+void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma)
+{
+	/* Enable charging trigger by BC1.2 detection */
+	int bc12_enable = (supplier == CHARGE_SUPPLIER_BC12_CDP ||
+			   supplier == CHARGE_SUPPLIER_BC12_DCP ||
+			   supplier == CHARGE_SUPPLIER_BC12_SDP ||
+			   supplier == CHARGE_SUPPLIER_OTHER);
+
+	if (bd9995x_bc12_enable_charging(port, bc12_enable))
+		return;
+
+	charge_set_input_current_limit(MAX(charge_ma,
+					   CONFIG_CHARGER_INPUT_CURRENT));
+}
+
+/**
+ * Return whether ramping is allowed for given supplier
+ */
+int board_is_ramp_allowed(int supplier)
+{
+	/* Don't allow ramping in RO when write protected */
+	if (system_get_image_copy() != SYSTEM_IMAGE_RW
+		&& system_is_locked())
+		return 0;
+	else
+		return (supplier == CHARGE_SUPPLIER_BC12_DCP ||
+			supplier == CHARGE_SUPPLIER_BC12_SDP ||
+			supplier == CHARGE_SUPPLIER_BC12_CDP ||
+			supplier == CHARGE_SUPPLIER_OTHER);
+}
+
+/**
+ * Return the maximum allowed input current
+ */
+int board_get_ramp_current_limit(int supplier, int sup_curr)
+{
+	return bd9995x_get_bc12_ilim(supplier);
+}
+
+/**
+ * Return if board is consuming full amount of input current
+ */
+int board_is_consuming_full_charge(void)
+{
+	int chg_perc = charge_get_percent();
+
+	return chg_perc > 2 && chg_perc < 95;
+}
+
+/**
+ * Return if VBUS is sagging too low
+ */
+int board_is_vbus_too_low(enum chg_ramp_vbus_state ramp_state)
+{
+	return charger_get_vbus_level() < BD9995X_BC12_MIN_VOLTAGE;
+}
+
+/* Enable or disable input devices, based upon chipset state and tablet mode */
+static void enable_input_devices(void)
+{
+	int kb_enable = 1;
+	int tp_enable = 1;
+
+	/* Disable both TP and KB in tablet mode */
+	if (!gpio_get_level(GPIO_TABLET_MODE_L))
+		kb_enable = tp_enable = 0;
+	/* Disable TP if chipset is off */
+	else if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
+		tp_enable = 0;
+
+	keyboard_scan_enable(kb_enable, KB_SCAN_DISABLE_LID_ANGLE);
+	gpio_set_level(GPIO_ENABLE_TOUCHPAD, tp_enable);
+}
+
+/* Called on AP S5 -> S3 transition */
+static void board_chipset_startup(void)
+{
+	hook_call_deferred(&enable_input_devices_data, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT);
+
+/* Called on AP S3 -> S5 transition */
+static void board_chipset_shutdown(void)
+{
+	hook_call_deferred(&enable_input_devices_data, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);
+
+void board_hibernate_late(void)
+{
+	int i;
+	const uint32_t hibernate_pins[][2] = {
+		{GPIO_LID_OPEN, GPIO_INT_RISING | GPIO_PULL_DOWN},
+		/* Turn off LEDs in hibernate */
+		{GPIO_CHARGE_LED_1, GPIO_OUTPUT | GPIO_LOW},
+		{GPIO_CHARGE_LED_2, GPIO_OUTPUT | GPIO_LOW},
+		{GPIO_CHARGE_LED_3, GPIO_OUTPUT | GPIO_LOW},
+		{GPIO_CHARGE_LED_4, GPIO_OUTPUT | GPIO_LOW},
+		{GPIO_CHARGE_LED_5, GPIO_OUTPUT | GPIO_LOW},
+		{GPIO_CHARGE_LED_6, GPIO_OUTPUT | GPIO_LOW},
+		/*
+		 * BD99956 handles charge input automatically. We'll disable
+		 * charge output in hibernate. Charger will assert ACOK_OD
+		 * when VBUS or VCC are plugged in.
+		 */
+		{GPIO_USB_C0_5V_EN, GPIO_INPUT | GPIO_PULL_DOWN},
+		{GPIO_USB_C1_5V_EN, GPIO_INPUT | GPIO_PULL_DOWN},
+	};
+
+	/* Change GPIOs' state in hibernate for better power consumption */
+	for (i = 0; i < ARRAY_SIZE(hibernate_pins); ++i)
+		gpio_set_flags(hibernate_pins[i][0], hibernate_pins[i][1]);
+
+	gpio_config_module(MODULE_KEYBOARD_SCAN, 0);
+
+	/*
+	 * Calling gpio_config_module sets disabled alternate function pins to
+	 * GPIO_INPUT.  But to prevent keypresses causing leakage currents
+	 * while hibernating we want to enable GPIO_PULL_UP as well.
+	 */
+	gpio_set_flags_by_mask(0x2, 0x03, GPIO_INPUT | GPIO_PULL_UP);
+	gpio_set_flags_by_mask(0x1, 0xFF, GPIO_INPUT | GPIO_PULL_UP);
+	gpio_set_flags_by_mask(0x0, 0xE0, GPIO_INPUT | GPIO_PULL_UP);
+}
+
+void board_hibernate(void)
+{
+	/* Enable both the VBUS & VCC ports before entering PG3 */
+	bd9995x_select_input_port(BD9995X_CHARGE_PORT_BOTH);
+}
diff --git a/board/eve/board.h b/board/eve/board.h
new file mode 100644
index 0000000000..f07fe69e45
--- /dev/null
+++ b/board/eve/board.h
@@ -0,0 +1,212 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Eve board configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+/*
+ * Allow dangerous commands.
+ * TODO: Remove this config before production.
+ */
+#define CONFIG_SYSTEM_UNLOCKED
+
+/* EC */
+#define CONFIG_ADC
+#define CONFIG_BOARD_HAS_BEFORE_RSMRST
+#define CONFIG_BOARD_VERSION
+#define CONFIG_BUTTON_COUNT 2
+#define CONFIG_CASE_CLOSED_DEBUG_EXTERNAL
+#define CONFIG_DPTF
+#define CONFIG_FLASH_SIZE 0x80000
+#define CONFIG_FPU
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
+#define CONFIG_KEYBOARD_COL2_INVERTED
+#define CONFIG_LID_SWITCH
+#define CONFIG_LTO
+#define CONFIG_PWM
+#define CONFIG_SPI_FLASH_W25X40
+#define CONFIG_UART_HOST 0
+#define CONFIG_VBOOT_HASH
+#define CONFIG_VSTORE
+#define CONFIG_VSTORE_SLOT_COUNT 1
+#define CONFIG_WATCHDOG_HELP
+#define CONFIG_WIRELESS
+#define CONFIG_WIRELESS_SUSPEND \
+	(EC_WIRELESS_SWITCH_WLAN | EC_WIRELESS_SWITCH_WLAN_POWER)
+#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L
+#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_DX_WLAN
+
+/* SOC */
+#define CONFIG_CHIPSET_SKYLAKE
+#define CONFIG_CHIPSET_RESET_HOOK
+#define CONFIG_ESPI
+#define CONFIG_ESPI_VW_SIGNALS
+#define CONFIG_LPC
+#define CONFIG_KEYBOARD_PROTOCOL_8042
+
+/* Battery */
+#define CONFIG_BATTERY_CUT_OFF
+#define CONFIG_BATTERY_DEVICE_CHEMISTRY "LION"
+#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATTERY_PRESENT_L
+#define CONFIG_BATTERY_REVIVE_DISCONNECT
+#define CONFIG_BATTERY_SMART
+
+/* Charger */
+#define CONFIG_CHARGE_MANAGER
+#define CONFIG_CHARGE_RAMP
+#define CONFIG_CHARGER
+#define CONFIG_CHARGER_V2
+#define CONFIG_CHARGER_BD99956
+#define CONFIG_CHARGER_DISCHARGE_ON_AC
+#define CONFIG_CHARGER_INPUT_CURRENT 512
+#define CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT 1
+#define CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW 15000
+#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1
+#define CONFIG_CHARGER_NARROW_VDC
+#define CONFIG_CHARGER_SENSE_RESISTOR 10
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
+#define BD9995X_IOUT_GAIN_SELECT \
+		BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V
+#define BD9995X_PSYS_GAIN_SELECT \
+		BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_02UAW
+#define CONFIG_CMD_CHARGER_ADC_AMON_BMON
+#define CONFIG_CMD_CHARGER_PSYS
+#define CONFIG_CMD_PD_CONTROL
+#define CONFIG_EXTPOWER_GPIO
+#undef   CONFIG_EXTPOWER_DEBOUNCE_MS
+#define  CONFIG_EXTPOWER_DEBOUNCE_MS 1000
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_X86
+#define CONFIG_POWER_COMMON
+#define CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD 30
+
+/* Sensor */
+#define CONFIG_ALS
+#define CONFIG_ALS_ISL29035
+#define CONFIG_TEMP_SENSOR
+#define CONFIG_TEMP_SENSOR_BD99992GW
+#define CONFIG_THERMISTOR_NCP15WB
+
+/* USB */
+#define CONFIG_USB_CHARGER
+#define CONFIG_USB_PD_ALT_MODE
+#define CONFIG_USB_PD_ALT_MODE_DFP
+#define CONFIG_USB_PD_CUSTOM_VDM
+#define CONFIG_USB_PD_DISCHARGE
+#define CONFIG_USB_PD_DISCHARGE_TCPC
+#define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_LOGGING
+#define CONFIG_USB_PD_LOG_SIZE 512
+#define CONFIG_USB_PD_PORT_COUNT 2
+#define CONFIG_USB_PD_QUIRK_SLOW_CC_STATUS
+#define CONFIG_USB_PD_VBUS_DETECT_CHARGER
+#define CONFIG_USB_PD_TCPC_FW_VERSION
+#define CONFIG_USB_PD_TCPM_MUX
+#define CONFIG_USB_PD_TCPM_ANX74XX
+#define CONFIG_USB_PD_TCPM_TCPCI
+#define CONFIG_USB_PD_TRY_SRC
+#define CONFIG_USB_POWER_DELIVERY
+#define CONFIG_USBC_SS_MUX
+#define CONFIG_USBC_SS_MUX_DFP_ONLY
+#define CONFIG_USBC_VCONN
+#define CONFIG_USBC_VCONN_SWAP
+
+/* Optional feature to configure npcx chip */
+#define NPCX_UART_MODULE2	1 /* 1:GPIO64/65 as UART */
+#define NPCX_JTAG_MODULE2	0 /* 0:GPIO21/17/16/20 as JTAG */
+#define NPCX_TACH_SEL2		0 /* 0:GPIO40/A4 as TACH */
+
+/* I2C ports */
+#define I2C_PORT_TCPC0		NPCX_I2C_PORT0_0
+#define I2C_PORT_TCPC1		NPCX_I2C_PORT0_1
+#define I2C_PORT_GYRO		NPCX_I2C_PORT1
+#define I2C_PORT_ACCEL		NPCX_I2C_PORT2
+#define I2C_PORT_ALS		NPCX_I2C_PORT2
+#define I2C_PORT_PMIC		NPCX_I2C_PORT3
+#define I2C_PORT_BATTERY	NPCX_I2C_PORT3
+#define I2C_PORT_CHARGER	NPCX_I2C_PORT3
+#define I2C_PORT_THERMAL	I2C_PORT_PMIC
+#define I2C_PORT_MP2949		NPCX_I2C_PORT3
+
+/* I2C addresses */
+#define I2C_ADDR_BD99992	0x60
+#define I2C_ADDR_MP2949		0x40
+
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+#include "registers.h"
+
+enum board_version_list {
+	BOARD_VERSION_P0,
+	BOARD_VERSION_P1,
+	BOARD_VERSION_EVT,
+	BOARD_VERSION_DVT,
+	BOARD_VERSION_PVT,
+};
+
+enum power_signal {
+	X86_SLP_S0_DEASSERTED,
+	X86_SLP_S3_DEASSERTED,
+	X86_SLP_S4_DEASSERTED,
+	X86_SLP_SUS_DEASSERTED,
+	X86_RSMRST_L_PGOOD,
+	X86_PMIC_DPWROK,
+	POWER_SIGNAL_COUNT
+};
+
+enum temp_sensor_id {
+	TEMP_SENSOR_BATTERY,	/* BD99956GW TSENSE */
+	TEMP_SENSOR_AMBIENT,	/* BD99992GW SYSTHERM0 */
+	TEMP_SENSOR_CHARGER,	/* BD99992GW SYSTHERM1 */
+	TEMP_SENSOR_DRAM,	/* BD99992GW SYSTHERM2 */
+	TEMP_SENSOR_EMMC,	/* BD99992GW SYSTHERM3 */
+	TEMP_SENSOR_COUNT
+};
+
+enum pwm_channel {
+	PWM_CH_KBLIGHT,
+	PWM_CH_COUNT
+};
+
+enum als_id {
+	ALS_ISL29035,
+	ALS_COUNT
+};
+
+enum adc_channel {
+	ADC_CH_COUNT
+};
+
+/* start as a sink in case we have no other power supply/battery */
+#define PD_DEFAULT_STATE PD_STATE_SNK_DISCONNECTED
+
+/*
+ * delay to turn on the power supply max is ~16ms.
+ * delay to turn off the power supply max is about ~180ms.
+ */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY	30000  /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY	250000 /* us */
+
+/* delay to turn on/off vconn */
+#define PD_VCONN_SWAP_DELAY		5000   /* us */
+
+/* Define typical operating power and max power */
+#define PD_OPERATING_POWER_MW		15000
+#define PD_MAX_POWER_MW			45000
+#define PD_MAX_CURRENT_MA		3000
+#define PD_MAX_VOLTAGE_MV		20000
+
+/* Board specific handlers */
+void board_reset_pd_mcu(void);
+void board_set_tcpc_power_mode(int port, int mode);
+void board_print_tcpc_fw_version(int port);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __CROS_EC_BOARD_H */
diff --git a/board/eve/build.mk b/board/eve/build.mk
new file mode 100644
index 0000000000..705891e38c
--- /dev/null
+++ b/board/eve/build.mk
@@ -0,0 +1,14 @@
+# -*- makefile -*-
+# Copyright 2016 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+CHIP:=npcx
+CHIP_VARIANT:=npcx5m6g
+
+board-y=board.o
+board-$(CONFIG_BATTERY_SMART)+=battery.o
+board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
diff --git a/board/eve/ec.tasklist b/board/eve/ec.tasklist
new file mode 100644
index 0000000000..916b05689e
--- /dev/null
+++ b/board/eve/ec.tasklist
@@ -0,0 +1,37 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
+ * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
+ * where :
+ * 'n' in the name of the task
+ * 'r' in the main routine of the task
+ * 'd' in an opaque parameter passed to the routine at startup
+ * 's' is the stack size in bytes; must be a multiple of 8
+ *
+ * For USB PD tasks, IDs must be in consecutive order and correspond to
+ * the port which they are for. See TASK_ID_TO_PD_PORT() macro.
+ */
+
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(ALS, als_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(USB_CHG, usb_charger_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE)
diff --git a/board/eve/gpio.inc b/board/eve/gpio.inc
new file mode 100644
index 0000000000..7d88a44998
--- /dev/null
+++ b/board/eve/gpio.inc
@@ -0,0 +1,117 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Declare symbolic names for all the GPIOs that we care about.
+ * Note: Those with interrupt handlers must be declared first. */
+
+GPIO_INT(CHARGER_INT_L,		PIN(3, 3), GPIO_INT_FALLING,			bd9995x_vbus_interrupt)
+GPIO_INT(USB_C0_PD_INT_ODL,	PIN(3, 7), GPIO_INT_FALLING,			tcpc_alert_event)
+GPIO_INT(USB_C1_PD_INT_ODL,	PIN(C, 5), GPIO_INT_FALLING,			tcpc_alert_event)
+GPIO_INT(PCH_SLP_S0_L,		PIN(7, 5), GPIO_INT_BOTH,			power_signal_interrupt)
+GPIO_INT(PCH_SLP_SUS_L,		PIN(6, 2), GPIO_INT_BOTH,			power_signal_interrupt)
+GPIO_INT(RSMRST_L_PGOOD,	PIN(B, 0), GPIO_INT_BOTH,			power_signal_interrupt)
+GPIO_INT(PMIC_DPWROK,		PIN(9, 7), GPIO_INT_BOTH,			power_signal_interrupt)
+GPIO_INT(POWER_BUTTON_L,	PIN(0, 4), GPIO_INT_BOTH | GPIO_PULL_UP,	power_button_interrupt)
+GPIO_INT(LID_OPEN,		PIN(6, 7), GPIO_INT_BOTH,			lid_interrupt)
+GPIO_INT(TABLET_MODE_L,		PIN(3, 6), GPIO_INT_BOTH,			tablet_mode_interrupt)
+GPIO_INT(VOLUME_DOWN_L,		PIN(8, 3), GPIO_INT_FALLING | GPIO_PULL_UP,	button_interrupt)
+GPIO_INT(VOLUME_UP_L,		PIN(8, 2), GPIO_INT_FALLING | GPIO_PULL_UP,	button_interrupt)
+GPIO_INT(WP_L,			PIN(4, 0), GPIO_INT_BOTH,			switch_interrupt)
+GPIO_INT(AC_PRESENT,		PIN(C, 1), GPIO_INT_BOTH,			extpower_interrupt)
+
+GPIO(PCH_RTCRST,		PIN(E, 7), GPIO_OUT_LOW)			/* RTCRST# to SOC */
+GPIO(ENABLE_BACKLIGHT,		PIN(5, 6), GPIO_OUT_LOW)			/* Enable Backlight */
+GPIO(ENABLE_TOUCHPAD,		PIN(3, 2), GPIO_OUT_LOW)			/* Enable Trackpad */
+GPIO(WLAN_OFF_L,		PIN(7, 2), GPIO_OUT_LOW)			/* Disable WLAN */
+GPIO(PP3300_DX_WLAN,		PIN(A, 7), GPIO_OUT_LOW)			/* Enable WLAN 3.3V Power */
+GPIO(CHARGER_RST_ODL,		PIN(0, 1), GPIO_ODR_HIGH)			/* CHARGER_RST_ODL */
+GPIO(CPU_PROCHOT,		PIN(8, 1), GPIO_OUT_HIGH)			/* PROCHOT# to SOC */
+GPIO(PCH_ACOK,			PIN(5, 0), GPIO_OUT_LOW)			/* ACOK to SOC */
+GPIO(PCH_WAKE_L,		PIN(A, 3), GPIO_ODR_HIGH)			/* Wake SOC */
+GPIO(PCH_RSMRST_L,		PIN(7, 0), GPIO_OUT_LOW)			/* RSMRST# to SOC */
+GPIO(PCH_PWRBTN_L,		PIN(4, 1), GPIO_ODR_HIGH)			/* Power Button to SOC */
+GPIO(EC_PLATFORM_RST,		PIN(A, 6), GPIO_INPUT)				/* EC Reset from H1 */
+GPIO(SYS_RESET_L,		PIN(6, 1), GPIO_ODR_HIGH)			/* Cold Reset to SOC */
+GPIO(PMIC_SLP_SUS_L,		PIN(8, 5), GPIO_OUT_LOW)			/* SLP_SUS# to PMIC */
+GPIO(BATTERY_PRESENT_L,		PIN(3, 4), GPIO_INPUT)				/* Battery Present */
+GPIO(CCD_MODE_ODL,		PIN(6, 3), GPIO_INPUT)				/* Case Closed Debug Mode */
+GPIO(EC_HAVEN_RESET_ODL,	PIN(0, 2), GPIO_ODR_HIGH)			/* H1 Reset */
+GPIO(ENTERING_RW,		PIN(7, 6), GPIO_OUTPUT)				/* EC Entering RW */
+GPIO(PMIC_INT_L,		PIN(6, 0), GPIO_INPUT)				/* PMIC interrupt */
+
+/* Sensor interrupts, not implemented yet */
+GPIO(ACCELGYRO3_INT_L,		PIN(9, 3), GPIO_INPUT)
+GPIO(ACCEL1_INT_L,		PIN(C, 7), GPIO_INPUT)
+
+/* I2C pins - these will be reconfigured for alternate function below */
+GPIO(I2C0_0_SCL,		PIN(B, 5), GPIO_INPUT)				/* EC_I2C00_USB_C0_SCL */
+GPIO(I2C0_0_SDA,		PIN(B, 4), GPIO_INPUT)				/* EC_I2C00_USB_C0_SDA */
+GPIO(I2C0_1_SCL,		PIN(B, 3), GPIO_INPUT)				/* EC_I2C01_USB_C1_SCL */
+GPIO(I2C0_1_SDA,		PIN(B, 2), GPIO_INPUT)				/* EC_I2C01_USB_C1_SDA */
+GPIO(I2C1_SCL,			PIN(9, 0), GPIO_INPUT)				/* EC_I2C1_GYRO_SCL */
+GPIO(I2C1_SDA,			PIN(8, 7), GPIO_INPUT)				/* EC_I2C1_GYRO_SDA */
+GPIO(I2C2_SCL,			PIN(9, 2), GPIO_INPUT)				/* EC_I2C2_SENSOR_3V3_SCL */
+GPIO(I2C2_SDA,			PIN(9, 1), GPIO_INPUT)				/* EC_I2C2_SENSOR_3V3_SDA */
+GPIO(I2C3_SCL,			PIN(D, 1), GPIO_INPUT)				/* EC_I2C3_POWER_SCL */
+GPIO(I2C3_SDA,			PIN(D, 0), GPIO_INPUT)				/* EC_I2C3_POWER_SDA */
+
+/* Charge LED */
+GPIO(CHARGE_LED_1,		PIN(8, 0), GPIO_OUT_LOW)			/* Charge LED 1 */
+GPIO(CHARGE_LED_2,		PIN(C, 4), GPIO_OUT_LOW)			/* Charge LED 2 */
+GPIO(CHARGE_LED_3,		PIN(B, 6), GPIO_OUT_LOW)			/* Charge LED 3 */
+GPIO(CHARGE_LED_4,		PIN(C, 0), GPIO_OUT_LOW)			/* Charge LED 4 */
+GPIO(CHARGE_LED_5,		PIN(C, 3), GPIO_OUT_LOW)			/* Charge LED 5 */
+GPIO(CHARGE_LED_6,		PIN(C, 2), GPIO_OUT_LOW)			/* Charge LED 6 */
+
+/* AP wake sources when in Deep-S3 state */
+GPIO(TOUCHPAD_WAKE_L,		PIN(7, 1), GPIO_INPUT | GPIO_SEL_1P8V)		/* INT# from Trackpad */
+GPIO(DSP_WAKE_L,		PIN(C, 6), GPIO_INPUT | GPIO_SEL_1P8V)		/* INT# from DSP Mic */
+
+/* 5V enables: INPUT=1.5A, OUT_LOW=OFF, OUT_HIGH=3A */
+GPIO(USB_C0_5V_EN,		PIN(4, 2), GPIO_OUT_LOW)			/* C0 5V Enable */
+GPIO(USB_C1_5V_EN,		PIN(B, 1), GPIO_OUT_LOW)			/* C1 5V Enable */
+GPIO(USB_C0_CABLE_DET,		PIN(D, 2), GPIO_INPUT)				/* C0 Cable Detect */
+GPIO(USB_C1_CABLE_DET,		PIN(D, 3), GPIO_INPUT)				/* C1 Cable Detect */
+GPIO(USB_C0_PD_RST_L,		PIN(0, 3), GPIO_OUT_LOW)			/* C0 PD Reset */
+GPIO(USB_C1_PD_RST_L,		PIN(7, 4), GPIO_OUT_LOW)			/* C1 PD Reset */
+GPIO(USB_C0_DP_HPD,		PIN(9, 4), GPIO_INPUT)				/* C0 DP Hotplug Detect */
+GPIO(USB_C1_DP_HPD,		PIN(A, 5), GPIO_INPUT)				/* C1 DP Hotplug Detect */
+GPIO(USB_C0_TCPC_PWR,		PIN(8, 4), GPIO_OUT_LOW)			/* Enable C0 TCPC Power */
+GPIO(USB_C1_TCPC_PWR,		PIN(0, 0), GPIO_OUT_LOW)			/* Enable C1 TCPC Power */
+GPIO(USB2_OTG_ID,		PIN(A, 1), GPIO_ODR_LOW)			/* OTG ID */
+GPIO(USB2_OTG_VBUSSENSE,	PIN(9, 5), GPIO_OUT_LOW)			/* OTG VBUS Sense */
+
+/* Board ID */
+GPIO(BOARD_VERSION1,		PIN(4, 3), GPIO_INPUT)				/* Board ID bit0 */
+GPIO(BOARD_VERSION2,		PIN(4, 4), GPIO_INPUT)				/* Board ID bit1 */
+GPIO(BOARD_VERSION3,		PIN(4, 5), GPIO_INPUT)				/* Board ID bit2 */
+
+/* Test points */
+GPIO(TP249,			PIN(6, 6), GPIO_INPUT | GPIO_PULL_UP)		/* EC_GPO66_ARM_L */
+GPIO(TP250,			PIN(3, 5), GPIO_INPUT | GPIO_PULL_UP)		/* EC_GPIO35_TEST_L */
+
+/* Alternate functions GPIO definitions */
+ALTERNATE(PIN_MASK(6, 0x30), 1, MODULE_UART, 0)		/* GPIO64-65 */		/* UART from EC to Servo */
+ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0)		/* GPIO87 */		/* EC_I2C1_GYRO_SDA */
+ALTERNATE(PIN_MASK(9, 0x01), 1, MODULE_I2C, 0)		/* GPIO90 */		/* EC_I2C1_GYRO_SCL */
+ALTERNATE(PIN_MASK(9, 0x06), 1, MODULE_I2C, 0)		/* GPIO91-92 */		/* EC_I2C2_SENSOR_3V3_SDA/SCL */
+ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0)		/* GPIOB4-B5 */		/* EC_I2C00_USB_C0_SDA/SCL */
+ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, 0)		/* GPOPB2-B3 */		/* EC_I2C01_USB_C1_SDA/SCL */
+ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0)		/* GPIOD0-D1 */		/* EC_I2C3_POWER_SDA/SCL */
+ALTERNATE(PIN_MASK(B, 0x80), 1, MODULE_PWM, 0)		/* GPIOB7 */		/* KBD_BL_PWM */
+
+/* Keyboard pins */
+#define GPIO_KB_INPUT		(GPIO_INPUT | GPIO_PULL_UP)
+#define GPIO_KB_OUTPUT		(GPIO_ODR_HIGH)
+#define GPIO_KB_OUTPUT_COL2	(GPIO_OUT_LOW)
+
+ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
+ALTERNATE(PIN_MASK(2, 0xfc), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
+ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
+ALTERNATE(PIN_MASK(0, 0xe0), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
+ALTERNATE(PIN_MASK(1, 0x7f), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
+GPIO(KBD_KSO2,			PIN(1, 7), GPIO_KB_OUTPUT_COL2)
diff --git a/board/eve/usb_pd_policy.c b/board/eve/usb_pd_policy.c
new file mode 100644
index 0000000000..f0eccf50aa
--- /dev/null
+++ b/board/eve/usb_pd_policy.c
@@ -0,0 +1,392 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "atomic.h"
+#include "extpower.h"
+#include "charge_manager.h"
+#include "common.h"
+#include "console.h"
+#include "driver/charger/bd9995x.h"
+#include "driver/tcpm/anx74xx.h"
+#include "driver/tcpm/ps8751.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "registers.h"
+#include "system.h"
+#include "task.h"
+#include "timer.h"
+#include "util.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
+			 PDO_FIXED_COMM_CAP)
+
+/* TODO: fill in correct source and sink capabilities */
+const uint32_t pd_src_pdo[] = {
+	PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
+
+const uint32_t pd_snk_pdo[] = {
+	PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
+	PDO_BATT(4750, 21000, 15000),
+	PDO_VAR(4750, 21000, 3000),
+};
+const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
+
+int pd_is_valid_input_voltage(int mv)
+{
+	return 1;
+}
+
+void pd_transition_voltage(int idx)
+{
+	/* No-operation: we are always 5V */
+}
+
+int pd_set_power_supply_ready(int port)
+{
+	/* Ensure we're not charging from this port */
+	if (charge_manager_get_active_charge_port() == port)
+		bd9995x_select_input_port(BD9995X_CHARGE_PORT_NONE);
+
+	/* Provide VBUS */
+	gpio_set_level(port ? GPIO_USB_C1_5V_EN :
+			      GPIO_USB_C0_5V_EN, 1);
+
+	pd_set_vbus_discharge(port, 0);
+
+	/* notify host of power info change */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+	return EC_SUCCESS; /* we are ready */
+}
+
+void pd_power_supply_reset(int port)
+{
+	enum gpio_signal gpio;
+	int prev_en;
+
+	gpio = port ? GPIO_USB_C1_5V_EN : GPIO_USB_C0_5V_EN;
+	prev_en = gpio_get_level(gpio);
+
+	/* Disable VBUS */
+	gpio_set_level(gpio, 0);
+
+	/* Enable discharge if we were previously sourcing 5V */
+	if (prev_en)
+		pd_set_vbus_discharge(port, 1);
+
+	/* notify host of power info change */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+void pd_set_input_current_limit(int port, uint32_t max_ma,
+				uint32_t supply_voltage)
+{
+#ifdef CONFIG_CHARGE_MANAGER
+	struct charge_port_info charge;
+
+	charge.current = max_ma;
+	charge.voltage = supply_voltage;
+	charge_manager_update_charge(CHARGE_SUPPLIER_PD, port, &charge);
+#endif
+}
+
+void typec_set_input_current_limit(int port, uint32_t max_ma,
+				   uint32_t supply_voltage)
+{
+#ifdef CONFIG_CHARGE_MANAGER
+	struct charge_port_info charge;
+
+	charge.current = max_ma;
+	charge.voltage = supply_voltage;
+	charge_manager_update_charge(CHARGE_SUPPLIER_TYPEC, port, &charge);
+#endif
+}
+
+int pd_board_checks(void)
+{
+	return EC_SUCCESS;
+}
+
+int pd_check_power_swap(int port)
+{
+	/*
+	 * Allow power swap as long as we are acting as a dual role device,
+	 * otherwise assume our role is fixed (not in S0 or console command
+	 * to fix our role).
+	 */
+	return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0;
+}
+
+int pd_check_data_swap(int port, int data_role)
+{
+	/* Allow data swap if we are a UFP, otherwise don't allow */
+	return (data_role == PD_ROLE_UFP) ? 1 : 0;
+}
+
+int pd_check_vconn_swap(int port)
+{
+	/* in G3, do not allow vconn swap since pp5000_A rail is off */
+	return gpio_get_level(GPIO_PMIC_SLP_SUS_L);
+}
+
+void pd_execute_data_swap(int port, int data_role)
+{
+	/* Do nothing */
+}
+
+void pd_check_pr_role(int port, int pr_role, int flags)
+{
+	/*
+	 * If partner is dual-role power and dualrole toggling is on, consider
+	 * if a power swap is necessary.
+	 */
+	if ((flags & PD_FLAGS_PARTNER_DR_POWER) &&
+	    pd_get_dual_role() == PD_DRP_TOGGLE_ON) {
+		/*
+		 * If we are a sink and partner is not externally powered, then
+		 * swap to become a source. If we are source and partner is
+		 * externally powered, swap to become a sink.
+		 */
+		int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER;
+
+		if ((!partner_extpower && pr_role == PD_ROLE_SINK) ||
+		     (partner_extpower && pr_role == PD_ROLE_SOURCE))
+			pd_request_power_swap(port);
+	}
+}
+
+void pd_check_dr_role(int port, int dr_role, int flags)
+{
+	/* If UFP, try to switch to DFP */
+	if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_UFP)
+		pd_request_data_swap(port);
+}
+/* ----------------- Vendor Defined Messages ------------------ */
+const struct svdm_response svdm_rsp = {
+	.identity = NULL,
+	.svids = NULL,
+	.modes = NULL,
+};
+
+int pd_custom_vdm(int port, int cnt, uint32_t *payload,
+		  uint32_t **rpayload)
+{
+	int cmd = PD_VDO_CMD(payload[0]);
+	uint16_t dev_id = 0;
+	int is_rw, is_latest;
+
+	/* make sure we have some payload */
+	if (cnt == 0)
+		return 0;
+
+	switch (cmd) {
+	case VDO_CMD_VERSION:
+		/* guarantee last byte of payload is null character */
+		*(payload + cnt - 1) = 0;
+		CPRINTF("version: %s\n", (char *)(payload+1));
+		break;
+	case VDO_CMD_READ_INFO:
+	case VDO_CMD_SEND_INFO:
+		/* copy hash */
+		if (cnt == 7) {
+			dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
+			is_rw = VDO_INFO_IS_RW(payload[6]);
+
+			is_latest = pd_dev_store_rw_hash(port,
+							 dev_id,
+							 payload + 1,
+							  is_rw ?
+							 SYSTEM_IMAGE_RW :
+							 SYSTEM_IMAGE_RO);
+			/*
+			 * Send update host event unless our RW hash is
+			 * already known to be the latest update RW.
+			 */
+			if (!is_rw || !is_latest)
+				pd_send_host_event(PD_EVENT_UPDATE_DEVICE);
+
+			CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
+				HW_DEV_ID_MAJ(dev_id),
+				HW_DEV_ID_MIN(dev_id),
+				VDO_INFO_SW_DBG_VER(payload[6]),
+				is_rw);
+		} else if (cnt == 6) {
+			/* really old devices don't have last byte */
+			pd_dev_store_rw_hash(port, dev_id, payload + 1,
+					     SYSTEM_IMAGE_UNKNOWN);
+		}
+		break;
+	case VDO_CMD_CURRENT:
+		CPRINTF("Current: %dmA\n", payload[1]);
+		break;
+	case VDO_CMD_FLIP:
+		usb_mux_flip(port);
+		break;
+#ifdef CONFIG_USB_PD_LOGGING
+	case VDO_CMD_GET_LOG:
+		pd_log_recv_vdm(port, cnt, payload);
+		break;
+#endif /* CONFIG_USB_PD_LOGGING */
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_USB_PD_ALT_MODE_DFP
+static int dp_flags[CONFIG_USB_PD_PORT_COUNT];
+static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT];
+
+static void svdm_safe_dp_mode(int port)
+{
+	/* make DP interface safe until configure */
+	dp_flags[port] = 0;
+	dp_status[port] = 0;
+	usb_mux_set(port, TYPEC_MUX_NONE,
+		USB_SWITCH_CONNECT, pd_get_polarity(port));
+}
+
+static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
+{
+	/* Only enter mode if device is DFP_D capable */
+	if (mode_caps & MODE_DP_SNK) {
+		svdm_safe_dp_mode(port);
+		return 0;
+	}
+
+	return -1;
+}
+
+static int svdm_dp_status(int port, uint32_t *payload)
+{
+	int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+
+	payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+			 CMD_DP_STATUS | VDO_OPOS(opos));
+	payload[1] = VDO_DP_STATUS(0, /* HPD IRQ  ... not applicable */
+				   0, /* HPD level ... not applicable */
+				   0, /* exit DP? ... no */
+				   0, /* usb mode? ... no */
+				   0, /* multi-function ... no */
+				   (!!(dp_flags[port] & DP_FLAGS_DP_ON)),
+				   0, /* power low? ... no */
+				   (!!(dp_flags[port] & DP_FLAGS_DP_ON)));
+	return 2;
+};
+
+static int svdm_dp_config(int port, uint32_t *payload)
+{
+	int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+	int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]);
+	int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]);
+
+	if (!pin_mode)
+		return 0;
+
+	usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP,
+		    USB_SWITCH_CONNECT, pd_get_polarity(port));
+
+	payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+			 CMD_DP_CONFIG | VDO_OPOS(opos));
+	payload[1] = VDO_DP_CFG(pin_mode,      /* pin mode */
+				1,             /* DPv1.3 signaling */
+				2);            /* UFP connected */
+	return 2;
+};
+
+static void svdm_dp_post_config(int port)
+{
+	const struct usb_mux *mux = &usb_muxes[port];
+
+	dp_flags[port] |= DP_FLAGS_DP_ON;
+	if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING))
+		return;
+	mux->hpd_update(port, 1, 0);
+}
+
+static int svdm_dp_attention(int port, uint32_t *payload)
+{
+	int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
+	int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
+	const struct usb_mux *mux = &usb_muxes[port];
+
+	dp_status[port] = payload[1];
+	if (!(dp_flags[port] & DP_FLAGS_DP_ON)) {
+		if (lvl)
+			dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING;
+		return 1;
+	}
+	mux->hpd_update(port, lvl, irq);
+
+	/* ack */
+	return 1;
+}
+
+static void svdm_exit_dp_mode(int port)
+{
+	const struct usb_mux *mux = &usb_muxes[port];
+
+	svdm_safe_dp_mode(port);
+	mux->hpd_update(port, 0, 0);
+}
+
+static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
+{
+	/* Always enter GFU mode */
+	return 0;
+}
+
+static void svdm_exit_gfu_mode(int port)
+{
+}
+
+static int svdm_gfu_status(int port, uint32_t *payload)
+{
+	/*
+	 * This is called after enter mode is successful, send unstructured
+	 * VDM to read info.
+	 */
+	pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
+	return 0;
+}
+
+static int svdm_gfu_config(int port, uint32_t *payload)
+{
+	return 0;
+}
+
+static int svdm_gfu_attention(int port, uint32_t *payload)
+{
+	return 0;
+}
+
+const struct svdm_amode_fx supported_modes[] = {
+	{
+		.svid = USB_SID_DISPLAYPORT,
+		.enter = &svdm_enter_dp_mode,
+		.status = &svdm_dp_status,
+		.config = &svdm_dp_config,
+		.post_config = &svdm_dp_post_config,
+		.attention = &svdm_dp_attention,
+		.exit = &svdm_exit_dp_mode,
+	},
+	{
+		.svid = USB_VID_GOOGLE,
+		.enter = &svdm_enter_gfu_mode,
+		.status = &svdm_gfu_status,
+		.config = &svdm_gfu_config,
+		.attention = &svdm_gfu_attention,
+		.exit = &svdm_exit_gfu_mode,
+	}
+};
+const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
+#endif /* CONFIG_USB_PD_ALT_MODE_DFP */
diff --git a/util/flash_ec b/util/flash_ec
index d7a93c88c9..9dcc8e0b79 100755
--- a/util/flash_ec
+++ b/util/flash_ec
@@ -102,6 +102,7 @@ BOARDS_NPCX_5M6G_JTAG=(
 )
 
 BOARDS_NPCX_SPI=(
+	eve
 	gru
 	kevin
 	pyro
@@ -129,6 +130,7 @@ BOARDS_SPI_1800MV=(
 )
 
 BOARDS_RAIDEN=(
+	eve
 	gru
 	kevin
 	pyro