diff options
| author | Caesar Wang <wxt@rock-chips.com> | 2016-09-05 22:00:40 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-10-27 19:28:55 -0700 |
| commit | 8292c4c2dfc65ebed569f765503c63db6aa61298 (patch) | |
| tree | 7b2a667602dd42ea3a6d43d92f08c28756781e29 | |
| parent | 799c272e282a4727da949940828d815f11c526db (diff) | |
| download | chrome-ec-8292c4c2dfc65ebed569f765503c63db6aa61298.tar.gz | |
power: rk3399: turn off the center logic in s3
CQ-DEPEND=CL:386537
BUG=chrome-os-partner:54291
TEST=turn off the center-logic
BRANCH=None
Change-Id: I73577e15cc0a8474d8eb2ed1a48f5aba59e54c6a
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/381158
Reviewed-by: Catherine Xu <caxu@google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
| -rw-r--r-- | power/rk3399.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/power/rk3399.c b/power/rk3399.c index 29d5b51051..bdf73853c1 100644 --- a/power/rk3399.c +++ b/power/rk3399.c @@ -206,9 +206,6 @@ enum power_state power_handle_state(enum power_state state) gpio_set_level(GPIO_PP1800_PMU_EN_L, 0); msleep(2); - /* TODO(crosbug.com/p/55981): De-power CLOGIC in S3 */ - gpio_set_level(GPIO_PPVAR_CLOGIC_EN, 1); - msleep(2); gpio_set_level(GPIO_LPDDR_PWR_EN, 1); msleep(2); gpio_set_level(GPIO_PP1800_USB_EN_L, 0); @@ -235,6 +232,8 @@ enum power_state power_handle_state(enum power_state state) return POWER_S3; case POWER_S3S0: + gpio_set_level(GPIO_PPVAR_CLOGIC_EN, 1); + msleep(2); gpio_set_level(GPIO_PP900_DDRPLL_EN, 1); msleep(2); gpio_set_level(GPIO_PP1800_AP_AVDD_EN_L, 0); @@ -304,6 +303,10 @@ enum power_state power_handle_state(enum power_state state) msleep(10); CHECK_ABORTED_SUSPEND(); + gpio_set_level(GPIO_PPVAR_CLOGIC_EN, 0); + msleep(10); + CHECK_ABORTED_SUSPEND(); + /* * Enable idle task deep sleep. Allow the low power idle task * to go into deep sleep in S3 or lower. @@ -334,8 +337,6 @@ enum power_state power_handle_state(enum power_state state) msleep(2); gpio_set_level(GPIO_LPDDR_PWR_EN, 0); msleep(2); - gpio_set_level(GPIO_PPVAR_CLOGIC_EN, 0); - msleep(10); gpio_set_level(GPIO_PP1800_PMU_EN_L, 1); msleep(2); gpio_set_level(GPIO_PP900_USB_EN, 0); |