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authorMary Ruthven <mruthven@chromium.org>2016-08-22 10:01:33 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-08-23 15:36:59 -0700
commitd0383d88146e19c64230670aa6769528e5228c76 (patch)
treea8998e971ca784a1075691d31013e72eaf636397
parent1e2148249a82a867b201d0689bdef1fa3d185569 (diff)
downloadchrome-ec-d0383d88146e19c64230670aa6769528e5228c76.tar.gz
cr50: remove internal pull up on DIOM0
There is leakage on SYS_RST_ODL from the internal pullup cr50 has on DIOM0. This change removes the internal pullup. Without the internal pull up SYS_RST_ODL is not pulled up whenever the EC is off. I changed how sys_rst_asserted is handled so it will ignore the sys_rst interrupt whenever rbox asserts EC_RST to make sure cr50 doesn't reset itself every time it resets the EC. If the EC resets itself and sys_rst_l is no longer pulled up, it is fine if cr50 resets. BUG=chrome-os-partner:53544 BRANCH=none TEST=manual 'rw 0x40550010 1' causes the EC to reset but not cr50 On the development board verify DIOM0 is not pulled up. Test cr50 boots normally on reef and gru Change-Id: Ic1d4d160ddb0d69081cb1f194d50939dac6fc5c2 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/373838 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
-rw-r--r--board/cr50/board.c5
-rw-r--r--board/cr50/gpio.inc3
-rw-r--r--chip/g/rbox.c5
-rw-r--r--chip/g/rbox.h14
4 files changed, 23 insertions, 4 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c
index f68a37543c..a271f0009a 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -15,6 +15,8 @@
#include "init_chip.h"
#include "registers.h"
#include "nvmem.h"
+#include "rbox.h"
+#include "spi.h"
#include "system.h"
#include "task.h"
#include "trng.h"
@@ -22,7 +24,6 @@
#include "usb_descriptor.h"
#include "usb_hid.h"
#include "util.h"
-#include "spi.h"
#include "usb_spi.h"
/* Define interrupt and gpio structs */
@@ -275,7 +276,7 @@ void sys_rst_asserted(enum gpio_signal signal)
* asserting this signal should not cause a system reset.
*/
CPRINTS("%s resceived signal %d)", __func__, signal);
- if (usb_spi_update_in_progress())
+ if (usb_spi_update_in_progress() || rbox_is_asserting_ec_reset())
return;
cflush();
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc
index 2659a2d1ae..fa4629b539 100644
--- a/board/cr50/gpio.inc
+++ b/board/cr50/gpio.inc
@@ -14,8 +14,7 @@
* TODO: Remove this internal pullup at some point. It's only here so that
* boards that don't have an external pullup don't trigger due to noise.
*/
-GPIO_INT(SYS_RST_L_IN, PIN(1, 0), GPIO_INT_FALLING | GPIO_PULL_UP,
- sys_rst_asserted)
+GPIO_INT(SYS_RST_L_IN, PIN(1, 0), GPIO_INT_FALLING, sys_rst_asserted)
GPIO_INT(AP_ON, PIN(1, 1), GPIO_INT_RISING, device_state_on)
GPIO_INT(EC_ON, PIN(1, 2), GPIO_INT_RISING, device_state_on)
GPIO_INT(SERVO_UART1_ON, PIN(1, 3), GPIO_INT_RISING | GPIO_PULL_DOWN,
diff --git a/chip/g/rbox.c b/chip/g/rbox.c
index d4c01b27ce..b46591d7a3 100644
--- a/chip/g/rbox.c
+++ b/chip/g/rbox.c
@@ -7,6 +7,11 @@
#include "hooks.h"
#include "registers.h"
+int rbox_is_asserting_ec_reset(void)
+{
+ return GREAD(RBOX, ASSERT_EC_RST);
+}
+
static void rbox_release_ec_reset(void)
{
/* Let the EC go (the RO bootloader asserts it ASAP after POR) */
diff --git a/chip/g/rbox.h b/chip/g/rbox.h
new file mode 100644
index 0000000000..5a99b11a2a
--- /dev/null
+++ b/chip/g/rbox.h
@@ -0,0 +1,14 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __CROS_RBOX_H
+#define __CROS_RBOX_H
+
+/*
+ * RBOX may be used to hold the EC in reset. Returns 1 if RBOX_ASSERT_EC_RST is
+ * being used to hold the EC in reset and 0 if it isn't.
+ */
+int rbox_is_asserting_ec_reset(void);
+#endif /* __CROS_RBOX_H */