diff options
| author | Bill Richardson <wfrichar@chromium.org> | 2016-08-23 13:27:12 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-08-24 17:41:00 -0700 |
| commit | 862644b9bb53013bf947d5b25f2ebbc942159517 (patch) | |
| tree | 8dc9b2033859ad95eb905d641bcc61d8a4ef009b | |
| parent | 2c9c6581bd1acfb7422726254678763699475054 (diff) | |
| download | chrome-ec-862644b9bb53013bf947d5b25f2ebbc942159517.tar.gz | |
Cr50: Tweak some comments about UART0_RX
Just adding a TODO comment to the gpio.inc file.
BUG=chrome-os-partner:56540
BRANCH=none
TEST=make buildall; test on Cr50 hardware
Change-Id: I5fa1a765232fd31b03d8825324a3a6a964504b5a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374619
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
| -rw-r--r-- | board/cr50/board.h | 2 | ||||
| -rw-r--r-- | board/cr50/gpio.inc | 21 | ||||
| -rw-r--r-- | chip/g/uartn.c | 1 |
3 files changed, 15 insertions, 9 deletions
diff --git a/board/cr50/board.h b/board/cr50/board.h index 8ebbc77188..4469a16cf4 100644 --- a/board/cr50/board.h +++ b/board/cr50/board.h @@ -154,6 +154,8 @@ void device_state_off(enum gpio_signal signal); #define UART_EC 2 #define UARTN UART_CR50 + +/* TODO(crosbug.com/p/56540): Remove this when UART0_RX works everywhere */ #define GC_UART0_RX_DISABLE /* diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index fa4629b539..293c8207a4 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -18,15 +18,15 @@ GPIO_INT(SYS_RST_L_IN, PIN(1, 0), GPIO_INT_FALLING, sys_rst_asserted) GPIO_INT(AP_ON, PIN(1, 1), GPIO_INT_RISING, device_state_on) GPIO_INT(EC_ON, PIN(1, 2), GPIO_INT_RISING, device_state_on) GPIO_INT(SERVO_UART1_ON, PIN(1, 3), GPIO_INT_RISING | GPIO_PULL_DOWN, - device_state_on) + device_state_on) GPIO_INT(SERVO_UART2_ON, PIN(1, 4), GPIO_INT_RISING | GPIO_PULL_DOWN, - device_state_on) + device_state_on) GPIO_INT(AP_OFF, PIN(1, 5), GPIO_INT_FALLING, device_state_off) GPIO_INT(EC_OFF, PIN(1, 6), GPIO_INT_FALLING, device_state_off) GPIO_INT(SERVO_UART1_OFF, PIN(1, 7), GPIO_INT_FALLING | GPIO_PULL_DOWN, - device_state_off) + device_state_off) GPIO_INT(SERVO_UART2_OFF, PIN(1, 8), GPIO_INT_FALLING | GPIO_PULL_DOWN, - device_state_off) + device_state_off) /* Pull this low to interrupt the AP */ GPIO(INT_AP_L, PIN(0, 0), GPIO_INPUT) @@ -83,13 +83,16 @@ PINMUX(GPIO(STRAP0), A1, DIO_INPUT) /* UARTs */ PINMUX(FUNC(UART0_TX), A0, DIO_OUTPUT) /* Cr50 console */ +/* PINMUX(FUNC(UART0_RX), A13, DIO_INPUT | DIO_WAKE_LOW) */ /* - * UART0_RX should only be used for debugging purposes. There is no internal - * pull up on DIOA13, so make sure there is an external pull up. If there is - * no external pull up cr50 will be held in UART0RX interrupts and will - * constantly reboot. + * TODO(crosbug.com/p/56540): Enable UART0_RX when possible. + * At the moment, UART0_RX should only be used for debugging purposes. + * If there is no external pull up on DIOA13, Cr50 can get continual UART0_RX + * interrupts and will constantly reboot. Not all boards have that pullup. * UART0_RX = DIOA13 - * + */ + +/* * UART1_TX and UART2_TX are configured in usart.c. They are not set as outputs * here in order to avoid interfering with servo. They can be controlled using * the 'uart' console command. diff --git a/chip/g/uartn.c b/chip/g/uartn.c index 304fd145f1..dc95f1fbf0 100644 --- a/chip/g/uartn.c +++ b/chip/g/uartn.c @@ -118,6 +118,7 @@ void uartn_enable(int uart) /* Enable UART TX */ GR_UART_CTRL(uart) = 0x01; +/* TODO(crosbug.com/p/56540): Remove this when UART0_RX works everywhere */ #ifdef GC_UART0_RX_DISABLE if (!uart) return; |