diff options
| author | Kyoung Kim <kyoung.il.kim@intel.com> | 2016-02-09 10:37:54 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-02-17 12:01:42 -0800 |
| commit | ebe37f0008af291a1a536ae9012cc370498fb818 (patch) | |
| tree | f28d35589b3734240c50c2bbaac2491810499234 | |
| parent | 12d032553a4b8de2dff0470fdc1c62ec716ba2b1 (diff) | |
| download | chrome-ec-ebe37f0008af291a1a536ae9012cc370498fb818.tar.gz | |
Lars: S0ix/S3 EC power improvement
USB2_OTG_ID and USB2_OTG_VBUSSENSE pins were floated due to open drain
configuration. Improve EC power and remove power difference between S3
and S0ix. Improve EC power for SOC G3.
BRANCH=firmware-glados-7820.B
BUG=none
TEST=measure EC powers at S3/SOC-G3 and S0ix and check if there
are difference
Change-Id: I0535be675bc3a3a84214590e8190f1fedae1142c
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/327070
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit 6dbad7f06e245bfa99e37326ed0517e81e207ef9)
Reviewed-on: https://chromium-review.googlesource.com/327480
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
| -rw-r--r-- | board/lars/gpio.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/lars/gpio.inc b/board/lars/gpio.inc index 0968a49817..25dda4051e 100644 --- a/board/lars/gpio.inc +++ b/board/lars/gpio.inc @@ -53,7 +53,7 @@ GPIO(PCH_RCIN_L, PIN(135), GPIO_ODR_HIGH) GPIO(LDO_EN, PIN(211), GPIO_OUT_LOW) GPIO(NC_145, PIN(145), GPIO_INPUT | GPIO_PULL_UP) GPIO(NC_147, PIN(147), GPIO_INPUT | GPIO_PULL_UP) -GPIO(USB2_OTG_ID, PIN(13), GPIO_ODR_HIGH) /* Empty */ +GPIO(USB2_OTG_ID, PIN(13), GPIO_ODR_LOW) /* Empty */ GPIO(NC_031, PIN(31), GPIO_INPUT | GPIO_PULL_UP) GPIO(USB1_ENABLE, PIN(36), GPIO_OUT_HIGH) GPIO(ENTERING_RW, PIN(41), GPIO_OUT_LOW) @@ -61,7 +61,7 @@ GPIO(PCH_PWRBTN_L, PIN(45), GPIO_OUT_HIGH) GPIO(BAT_PRESENT_L, PIN(56), GPIO_INPUT) GPIO(USB_PD_WAKE, PIN(60), GPIO_OUT_LOW) /* Empty */ GPIO(PCH_WAKE_L, PIN(66), GPIO_ODR_HIGH) -GPIO(USB2_OTG_VBUSSENSE, PIN(105), GPIO_ODR_HIGH) /* Empty */ +GPIO(USB2_OTG_VBUSSENSE, PIN(105), GPIO_OUT_LOW) /* Empty */ GPIO(PCH_ACOK, PIN(110), GPIO_OUT_LOW) GPIO(USB2_ENABLE, PIN(67), GPIO_OUT_HIGH) /* Puesdo G3 */ |