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authorBill Richardson <wfrichar@chromium.org>2015-09-03 17:23:20 -0700
committerchrome-bot <chrome-bot@chromium.org>2015-09-08 10:38:21 -0700
commit15fcbc95967b79157dc892f547206f2a0967d2ff (patch)
tree612ab66f9e2ba9a59a44e721078e084f0b76e272
parent7bdb69c464e8056b77f3727411d02f5b5fe970b8 (diff)
downloadchrome-ec-15fcbc95967b79157dc892f547206f2a0967d2ff.tar.gz
Cleanup: Remove COMPILE_FOR_RAM option from linker scripts
This option was added way back in January 2012 for early EC bringup, and never used since. We can probably remove it. BUG=none BRANCH=none TEST=make buildall Change-Id: Idc8c3099388f2e28d620848a0e78b555b02fba9c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297334 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r--chip/lm4/config_chip.h3
-rw-r--r--chip/npcx/config_chip.h3
-rw-r--r--chip/stm32/config_chip.h3
-rw-r--r--core/cortex-m/ec.lds.S20
-rw-r--r--core/cortex-m/init.S2
-rw-r--r--core/cortex-m0/ec.lds.S12
-rw-r--r--core/cortex-m0/init.S2
-rw-r--r--core/nds32/ec.lds.S12
8 files changed, 3 insertions, 54 deletions
diff --git a/chip/lm4/config_chip.h b/chip/lm4/config_chip.h
index ca615ca492..d02e0c530f 100644
--- a/chip/lm4/config_chip.h
+++ b/chip/lm4/config_chip.h
@@ -94,9 +94,6 @@
#define CONFIG_SWITCH
#define CONFIG_MPU
-/* Compile for running from RAM instead of flash */
-/* #define COMPILE_FOR_RAM */
-
#define GPIO_PIN(port, index) GPIO_##port, (1 << index)
#define GPIO_PIN_MASK(port, mask) GPIO_##port, (mask)
diff --git a/chip/npcx/config_chip.h b/chip/npcx/config_chip.h
index be2e0c15a0..6bb5809235 100644
--- a/chip/npcx/config_chip.h
+++ b/chip/npcx/config_chip.h
@@ -89,9 +89,6 @@
#define CONFIG_SWITCH
#define CONFIG_MPU
-/* Compile for running from RAM instead of flash */
-/* #define COMPILE_FOR_RAM */
-
#define GPIO_PIN(port, index) GPIO_##port, (1 << index)
#define GPIO_PIN_MASK(port, mask) GPIO_##port, (mask)
diff --git a/chip/stm32/config_chip.h b/chip/stm32/config_chip.h
index 868cf3e1f5..be115b5cf9 100644
--- a/chip/stm32/config_chip.h
+++ b/chip/stm32/config_chip.h
@@ -94,9 +94,6 @@
/* Flash protection applies to the next boot, not the current one */
#define CONFIG_FLASH_PROTECT_NEXT_BOOT
-/* Compile for running from RAM instead of flash */
-/* #define COMPILE_FOR_RAM */
-
#define GPIO_NAME_BY_PIN(port, index) #port#index
#define GPIO_PIN(port, index) GPIO_##port, (1 << index)
#define GPIO_PIN_MASK(port, mask) GPIO_##port, (mask)
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S
index e752fe9df7..11c91ba301 100644
--- a/core/cortex-m/ec.lds.S
+++ b/core/cortex-m/ec.lds.S
@@ -12,7 +12,6 @@
#define FW_SIZE_(section) CONFIG_##section##_SIZE
#define FW_SIZE(section) FW_SIZE_(section)
-
OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)
OUTPUT_ARCH(BFD_ARCH)
ENTRY(reset)
@@ -93,12 +92,8 @@ SECTIONS
__flash_lpfw_end = .;
} > CDRAM AT > FLASH
#else
-#ifdef COMPILE_FOR_RAM
- } > IRAM
-#else
} > FLASH
#endif
-#endif
. = ALIGN(4);
.rodata : {
/* Symbols defined here are declared in link_defs.h */
@@ -208,12 +203,8 @@ SECTIONS
#ifdef CONFIG_CODERAM_ARCH
} > CDRAM AT > FLASH
#else
-#ifdef COMPILE_FOR_RAM
- } > IRAM
-#else
} > FLASH
#endif
-#endif
__ro_end = . ;
__deferred_funcs_count =
@@ -224,9 +215,8 @@ SECTIONS
.bss : {
/*
* Align to 512 bytes. This is convenient when some memory block
- * need big alignment. When COMPILE_FOR_RAM is not set, this is the
- * beginning of the RAM, so there is usually no penalty on aligning
- * this.
+ * needs big alignment. This is the beginning of the RAM, so there
+ * is usually no penalty on aligning this.
*/
. = ALIGN(512);
__bss_start = .;
@@ -239,15 +229,11 @@ SECTIONS
. = ALIGN(4);
__bss_end = .;
} > IRAM
-#ifdef COMPILE_FOR_RAM
- .data : {
-#else
#ifdef CONFIG_CODERAM_ARCH
- .data : AT(LOADADDR(.rodata) + SIZEOF(.rodata)) {
+ .data : AT(LOADADDR(.rodata) + SIZEOF(.rodata)) {
#else
.data : AT(ADDR(.rodata) + SIZEOF(.rodata)) {
#endif
-#endif
. = ALIGN(4);
__data_start = .;
*(.data.tasks)
diff --git a/core/cortex-m/init.S b/core/cortex-m/init.S
index ac16fa83c7..ac82530509 100644
--- a/core/cortex-m/init.S
+++ b/core/cortex-m/init.S
@@ -329,7 +329,6 @@ bss_loop:
strlt r0, [r1], #4
blt bss_loop
-#ifndef COMPILE_FOR_RAM
/* Copy initialized data to Internal RAM */
ldr r0,_ro_end
ldr r1,_data_start
@@ -340,7 +339,6 @@ data_loop:
it lt
strlt r3, [r1], #4
blt data_loop
-#endif
/*
* Set stack pointer. Already done by Cortex-M hardware, but re-doing
diff --git a/core/cortex-m0/ec.lds.S b/core/cortex-m0/ec.lds.S
index 594fcfff50..8f3f382c98 100644
--- a/core/cortex-m0/ec.lds.S
+++ b/core/cortex-m0/ec.lds.S
@@ -55,11 +55,7 @@ SECTIONS
#endif
OUTDIR/core/CORE/init.o (.text)
*(.text*)
-#ifdef COMPILE_FOR_RAM
- } > IRAM
-#else
} > FLASH
-#endif
. = ALIGN(4);
.rodata : {
/* Symbols defined here are declared in link_defs.h */
@@ -167,11 +163,7 @@ SECTIONS
KEEP(*(.google))
#endif
. = ALIGN(4);
-#ifdef COMPILE_FOR_RAM
- } > IRAM
-#else
} > FLASH
-#endif
__ro_end = . ;
__deferred_funcs_count =
@@ -196,11 +188,7 @@ SECTIONS
. = ALIGN(4);
__bss_end = .;
} > IRAM
-#ifdef COMPILE_FOR_RAM
- .data : {
-#else
.data : AT(ADDR(.rodata) + SIZEOF(.rodata)) {
-#endif
. = ALIGN(4);
__data_start = .;
*(.data.tasks)
diff --git a/core/cortex-m0/init.S b/core/cortex-m0/init.S
index 040d61be96..9b8a774415 100644
--- a/core/cortex-m0/init.S
+++ b/core/cortex-m0/init.S
@@ -132,7 +132,6 @@ vtable_loop:
str r1, [r2]
#endif
-#ifndef COMPILE_FOR_RAM
/* Copy initialized data to Internal RAM */
ldr r0,_ro_end
ldr r1,_data_start
@@ -144,7 +143,6 @@ data_loop:
adds r1, #4
cmp r1, r2
blt data_loop
-#endif
/*
* Set stack pointer. Already done by Cortex-M hardware, but re-doing
diff --git a/core/nds32/ec.lds.S b/core/nds32/ec.lds.S
index a936e72d62..d3e8cc7c20 100644
--- a/core/nds32/ec.lds.S
+++ b/core/nds32/ec.lds.S
@@ -42,11 +42,7 @@ SECTIONS
__flash_dma_start = .;
KEEP(*(.flash_direct_map))
. = ALIGN(CONFIG_IT83XX_ILM_BLOCK_SIZE);
-#ifdef COMPILE_FOR_RAM
- } > IRAM
-#else
} > FLASH
-#endif
. = ALIGN(4);
.rodata : {
/* Symbols defined here are declared in link_defs.h */
@@ -145,18 +141,10 @@ SECTIONS
KEEP(*(.google))
#endif
. = ALIGN(4);
-#ifdef COMPILE_FOR_RAM
- } > IRAM
-#else
} >FLASH
-#endif
__ro_end = . ;
-#ifdef COMPILE_FOR_RAM
- .data : {
-#else
.data : {
-#endif
. = ALIGN(4);
__data_start = .;
*(.data.tasks)