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authorVadim Bendebury <vbendeb@chromium.org>2015-07-28 20:39:52 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-08-14 21:04:43 +0000
commit571b7bb640522e341ca3c95fb708c5a1ae4f74a8 (patch)
tree67613447b1671fa369732d38919965f3e6ae34d4
parent6386c37379284390ed53a7146116947b49576fac (diff)
downloadchrome-ec-571b7bb640522e341ca3c95fb708c5a1ae4f74a8.tar.gz
cr50: tpm2: pull in the tpm2 library sources
This patch syncs up TPM2 sources into the build area when building cr50 image. This relies on a specific directory layout so that the ec makefile has access to the tpm2 source tree. The sources are copied using rsync, the tpm2 library is a dependency for the RO/RW elf images, and is declared to be a phony make target, which guarantees that the tpm2 make is always run when cr50 image is built. Include files in board/cr50/tpm2 are necessary to be able to build tpm2 code using the bare metal toolchain used for building ec code. memory.h is in fact empty, it is easier to add it here than to wrap it in conditional compilation at the source. Make variables CROSS_COMPILE and CFLAGS are exported for the benefit of the tpm2 makefile. ROOTDIR indicates where tpm2 library should look for .h files not available from the toolchain. CQ-DEPEND=CL:292946 BRANCH=none BUG=chrome-os-partner:43025 TEST=make buildall -j succeeds; when linked with the latest tpm2 source, the combined image starts the tmp task and reacts to the host sending the startup command (failing due to unplugged stubs). Change-Id: Ia3fd260588558c2bacd724df9583052fa4660ca3 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/292975 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
-rw-r--r--Makefile2
-rw-r--r--board/cr50/build.mk14
-rw-r--r--board/cr50/tpm2/endian.h48
-rw-r--r--board/cr50/tpm2/memory.h11
-rw-r--r--chip/g/config_chip.h4
-rw-r--r--common/tpm_registers.c20
6 files changed, 94 insertions, 5 deletions
diff --git a/Makefile b/Makefile
index 6e68c6ba60..9385bacf20 100644
--- a/Makefile
+++ b/Makefile
@@ -192,5 +192,5 @@ libsharedobjs_elf-$(CONFIG_SHAREDLIB) := \
libsharedobjs: $(libsharedobjs-y)
include Makefile.rules
-
+export CROSS_COMPILE CFLAGS
endif # SYMLINK
diff --git a/board/cr50/build.mk b/board/cr50/build.mk
index 247303cb0f..5f5d93aa32 100644
--- a/board/cr50/build.mk
+++ b/board/cr50/build.mk
@@ -10,6 +10,20 @@ CHIP_FAMILY:=cr50
CHIP_VARIANT ?= cr50_fpga
board-y=board.o
+LDFLAGS_EXTRA += -L$(out)/tpm2/build -ltpm2
# Need to generate a .hex file
all: hex
+
+ifeq ($(BOARD_MK_INCLUDED),)
+BOARD_MK_INCLUDED=1
+
+$(out)/RO/ec.RO.elf: $(out)/tpm2/build/libtpm2.a
+$(out)/RW/ec.RW.elf: $(out)/tpm2/build/libtpm2.a
+
+.PHONY: $(out)/tpm2/build/libtpm2.a
+$(out)/tpm2/build/libtpm2.a:
+ rsync -a ../../third_party/tpm2 $(out)
+ $(MAKE) ROOTDIR=$(realpath board/$(BOARD)/tpm2) EMBEDDED_MODE=1 \
+ -C $(out)/tpm2
+endif
diff --git a/board/cr50/tpm2/endian.h b/board/cr50/tpm2/endian.h
new file mode 100644
index 0000000000..893a794c16
--- /dev/null
+++ b/board/cr50/tpm2/endian.h
@@ -0,0 +1,48 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __EC_BOARD_CR50_TPM2_ENDIAN_H
+#define __EC_BOARD_CR50_TPM2_ENDIAN_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+static inline void swap_n(void *in, void *out, size_t size)
+{
+ int i;
+
+ for (i = 0; i < size; i++)
+ ((uint8_t *)out)[size - i - 1] = ((uint8_t *)in)[i];
+}
+
+static inline uint16_t be16toh(uint16_t in)
+{
+ uint16_t out;
+
+ swap_n(&in, &out, sizeof(out));
+ return out;
+}
+
+static inline uint32_t be32toh(uint32_t in)
+{
+ uint32_t out;
+
+ swap_n(&in, &out, sizeof(out));
+ return out;
+}
+
+static inline uint64_t be64toh(uint64_t in)
+{
+ uint64_t out;
+
+ swap_n(&in, &out, sizeof(out));
+ return out;
+}
+
+#define htobe16 be16toh
+#define htobe32 be32toh
+#define htobe64 be64toh
+
+#endif /* __EC_BOARD_CR50_TPM2_ENDIAN_H */
diff --git a/board/cr50/tpm2/memory.h b/board/cr50/tpm2/memory.h
new file mode 100644
index 0000000000..de9729313d
--- /dev/null
+++ b/board/cr50/tpm2/memory.h
@@ -0,0 +1,11 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __EC_BOARD_CR50_TPM2_MEMORY_H
+#define __EC_BOARD_CR50_TPM2_MEMORY_H
+
+/* An empty file to meet expectations of the tpm2 library. */
+
+#endif /* __EC_BOARD_CR50_TPM2_MEMORY_H */
diff --git a/chip/g/config_chip.h b/chip/g/config_chip.h
index b886b5addf..b194493404 100644
--- a/chip/g/config_chip.h
+++ b/chip/g/config_chip.h
@@ -14,7 +14,7 @@
/* Describe the RAM layout */
#define CONFIG_RAM_BASE 0x10000
-#define CONFIG_RAM_SIZE 0x8000
+#define CONFIG_RAM_SIZE 0x10000
/* Flash chip specifics */
/* TODO(crosbug.com/p/33815): These are probably wrong. Don't use them yet. */
@@ -27,7 +27,7 @@
/* TODO(wfrichar): Lying about this, so image signing works.
* I'll file a bug once this CL goes in. */
/* #define CONFIG_FLASH_PHYSICAL_SIZE (512 * 1024) */
-#define CONFIG_FLASH_PHYSICAL_SIZE (256 * 1024)
+#define CONFIG_FLASH_PHYSICAL_SIZE (512 * 1024)
/* Compute the rest of the flash params from these */
#include "config_std_internal_flash.h"
diff --git a/common/tpm_registers.c b/common/tpm_registers.c
index f4babe8d5f..edd67e6719 100644
--- a/common/tpm_registers.c
+++ b/common/tpm_registers.c
@@ -16,6 +16,11 @@
#include "tpm_registers.h"
#include "util.h"
+/* TPM2 library includes. */
+#include "tpm2/ExecCommand_fp.h"
+#include "tpm2/Platform.h"
+#include "tpm2/_TPM_Init_fp.h"
+
#define CPRINTS(format, args...) cprints(CC_TPM, format, ## args)
#define CPRINTF(format, args...) cprintf(CC_TPM, format, ## args)
@@ -371,7 +376,12 @@ static void tpm_init(void)
tpm_.state = tpm_state_idle;
tpm_.regs.access = tpm_reg_valid_sts;
tpm_.regs.sts = (tpm_family_tpm2 << tpm_family_shift) |
- (64 << burst_count_shift);
+ (64 << burst_count_shift) | sts_valid;
+
+ /* TPM2 library functions. */
+ _plat__Signal_PowerOn();
+ _TPM_Init();
+ _plat__SetNvAvail();
}
void tpm_task(void)
@@ -379,11 +389,17 @@ void tpm_task(void)
tpm_init();
sps_tpm_enable();
while (1) {
+ uint8_t *response;
+ unsigned response_size;
+
/* Wait for the next command event */
task_wait_event(-1);
CPRINTF("%s: received fifo command 0x%04x\n",
__func__, be32_to_cpu(tpm_.regs.data_fifo + 6));
+ ExecuteCommand(tpm_.fifo_write_index,
+ tpm_.regs.data_fifo,
+ &response_size,
+ &response);
}
}
-