kunimitsu: Initial GPIO and Power Sequence support

BUG=none
TEST=Device boots to UI.
BRANCH=none

Change-Id: I2b2cc471b096f8f6d2b2a6af4a634f05fcc3b989
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/270775
Reviewed-by: Shawn N <shawnn@chromium.org>

8 files changed, 605 insertions, 0 deletions

diff --git a/board/kunimitsu/Makefile b/board/kunimitsu/Makefile
new file mode 120000
index 0000000000..94aaae2c4d
--- /dev/null
+++ b/board/kunimitsu/Makefile
@@ -0,0 +1 @@
+../../Makefile
\ No newline at end of file
diff --git a/board/kunimitsu/battery.c b/board/kunimitsu/battery.c
new file mode 100644
index 0000000000..440bcaaacb
--- /dev/null
+++ b/board/kunimitsu/battery.c
@@ -0,0 +1,63 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "battery.h"
+#include "battery_smart.h"
+#include "console.h"
+#include "gpio.h"
+#include "host_command.h"
+#include "util.h"
+
+/* Shutdown mode parameter to write to manufacturer access register */
+#define SB_SHUTDOWN_DATA	0x0010
+
+static const struct battery_info info = {
+	.voltage_max = 8700,/* mV */
+	.voltage_normal = 7600,
+	.voltage_min = 6000,
+	.precharge_current = 150,/* mA */
+	.start_charging_min_c = 0,
+	.start_charging_max_c = 45,
+	.charging_min_c = 0,
+	.charging_max_c = 45,
+	.discharging_min_c = -20,
+	.discharging_max_c = 60,
+};
+
+const struct battery_info *battery_get_info(void)
+{
+	return &info;
+}
+
+static int cutoff(void)
+{
+	int rv;
+
+	/* Ship mode command must be sent twice to take effect */
+	rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
+
+	if (rv != EC_SUCCESS)
+		return rv;
+
+	return sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
+}
+
+static int battery_command_cut_off(struct host_cmd_handler_args *args)
+{
+	return cutoff() ? EC_RES_ERROR : EC_RES_SUCCESS;
+}
+DECLARE_HOST_COMMAND(EC_CMD_BATTERY_CUT_OFF, battery_command_cut_off,
+		     EC_VER_MASK(0));
+
+static int command_battcutoff(int argc, char **argv)
+{
+	return cutoff();
+}
+DECLARE_CONSOLE_COMMAND(battcutoff, command_battcutoff,
+			NULL,
+			"Enable battery cutoff (ship mode)",
+			NULL);
diff --git a/board/kunimitsu/board.c b/board/kunimitsu/board.c
new file mode 100644
index 0000000000..7e4af229e0
--- /dev/null
+++ b/board/kunimitsu/board.c
@@ -0,0 +1,215 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+/* Skylake Chrome Reference Design board-specific configuration */
+
+#include "als.h"
+#include "button.h"
+#include "charger.h"
+#include "charge_state.h"
+#include "driver/accel_kxcj9.h"
+#include "driver/als_isl29035.h"
+#include "driver/temp_sensor/tmp432.h"
+#include "extpower.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "i2c.h"
+#include "lid_switch.h"
+#include "math_util.h"
+#include "motion_lid.h"
+#include "motion_sense.h"
+#include "power.h"
+#include "power_button.h"
+#include "registers.h"
+#include "switch.h"
+#include "temp_sensor.h"
+#include "temp_sensor_chip.h"
+#include "thermal.h"
+#include "timer.h"
+#include "util.h"
+
+#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP)
+#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH)
+#define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW)
+
+/* Exchange status with PD MCU. */
+static void pd_mcu_interrupt(enum gpio_signal signal)
+{
+}
+
+void vbus0_evt(enum gpio_signal signal)
+{
+}
+
+void vbus1_evt(enum gpio_signal signal)
+{
+}
+
+void usb0_evt(enum gpio_signal signal)
+{
+}
+
+void usb1_evt(enum gpio_signal signal)
+{
+}
+
+#include "gpio_list.h"
+
+/* power signal list.  Must match order of enum power_signal. */
+const struct power_signal_info power_signal_list[] = {
+	{GPIO_RSMRST_L_PGOOD,    1, "RSMRST_N_PWRGD"},
+	{GPIO_PCH_SLP_S0_L,      1, "SLP_S0#_DEASSERTED"},
+	{GPIO_PCH_SLP_S3_L,      1, "SLP_S3#_DEASSERTED"},
+	{GPIO_PCH_SLP_S4_L,      1, "SLP_S4#_DEASSERTED"},
+	{GPIO_PCH_SLP_SUS_L,     1, "SLP_SUS_DEASSERTED"},
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
+
+const struct i2c_port_t i2c_ports[]  = {
+	{"batt_chg_thermal", MEC1322_I2C0_0, 100,
+		GPIO_I2C_PORT0_SCL, GPIO_I2C_PORT0_SDA},
+	{"sensors",  MEC1322_I2C2,   100,
+		GPIO_I2C_PORT2_SCL, GPIO_I2C_PORT2_SDA},
+};
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+/*
+ * Temperature sensors data; must be in same order as enum temp_sensor_id.
+ * Sensor index and name must match those present in coreboot:
+ *     src/mainboard/google/${board}/acpi/dptf.asl
+ */
+const struct temp_sensor_t temp_sensors[] = {
+	{"TMP432_Internal", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val,
+		TMP432_IDX_LOCAL, 4},
+	{"TMP432_Sensor_1", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val,
+		TMP432_IDX_REMOTE1, 4},
+	{"TMP432_Sensor_2", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val,
+		TMP432_IDX_REMOTE2, 4},
+	{"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_temp_sensor_get_val,
+		0, 4},
+};
+BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
+
+/* ALS instances. Must be in same order as enum als_id. */
+struct als_t als[] = {
+	{"ISL", isl29035_read_lux, 5},
+};
+BUILD_ASSERT(ARRAY_SIZE(als) == ALS_COUNT);
+
+#ifdef CONFIG_BUTTON_COUNT
+const struct button_config buttons[] = {
+	{"Volume Down", KEYBOARD_BUTTON_VOLUME_DOWN, GPIO_VOLUME_DOWN_L,
+		30 * MSEC, 0},
+	{"Volume Up", KEYBOARD_BUTTON_VOLUME_UP, GPIO_VOLUME_UP_L,
+		30 * MSEC, 0},
+};
+BUILD_ASSERT(ARRAY_SIZE(buttons) == CONFIG_BUTTON_COUNT);
+#endif
+
+/* Thermal limits for each temp sensor. All temps are in degrees K. Must be in
+ * same order as enum temp_sensor_id. To always ignore any temp, use 0.
+ */
+struct ec_thermal_config thermal_params[] = {
+	{{0, 0, 0}, 0, 0}, /* TMP432_Internal */
+	{{0, 0, 0}, 0, 0}, /* TMP432_Sensor_1 */
+	{{0, 0, 0}, 0, 0}, /* TMP432_Sensor_2 */
+	{{0, 0, 0}, 0, 0}, /* Battery Sensor */
+};
+BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
+
+int board_discharge_on_ac(int enable)
+{
+	return charger_discharge_on_ac(enable);
+}
+
+/* Four Motion sensors */
+/* kxcj9 mutex and local/private data*/
+static struct mutex g_kxcj9_mutex[2];
+struct kxcj9_data g_kxcj9_data[2];
+
+/* Matrix to rotate accelrator into standard reference frame */
+const matrix_3x3_t base_standard_ref = {
+	{ 0,  FLOAT_TO_FP(1),  0},
+	{FLOAT_TO_FP(-1),  0,  0},
+	{ 0,  0,  FLOAT_TO_FP(1)}
+};
+
+const matrix_3x3_t lid_standard_ref = {
+	{FLOAT_TO_FP(-1),  0,  0},
+	{ 0, FLOAT_TO_FP(-1),  0},
+	{ 0,  0, FLOAT_TO_FP(-1)}
+};
+
+struct motion_sensor_t motion_sensors[] = {
+	{.name = "Base Accel",
+	 .active_mask = SENSOR_ACTIVE_S0,
+	 .chip = MOTIONSENSE_CHIP_KXCJ9,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_BASE,
+	 .drv = &kxcj9_drv,
+	 .mutex = &g_kxcj9_mutex[0],
+	 .drv_data = &g_kxcj9_data[0],
+	 .i2c_addr = KXCJ9_ADDR1,
+	 .rot_standard_ref = &base_standard_ref,
+	 .default_config = {
+		 .odr = 100000,
+		 .range = 2
+	 }
+	},
+	{.name = "Lid Accel",
+	 .active_mask = SENSOR_ACTIVE_S0,
+	 .chip = MOTIONSENSE_CHIP_KXCJ9,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_LID,
+	 .drv = &kxcj9_drv,
+	 .mutex = &g_kxcj9_mutex[1],
+	 .drv_data = &g_kxcj9_data[1],
+	 .i2c_addr = KXCJ9_ADDR0,
+	 .rot_standard_ref = &lid_standard_ref,
+	 .default_config = {
+		 .odr = 100000,
+		 .range = 2
+	 }
+	},
+};
+const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
+
+/* Define the accelerometer orientation matrices. */
+const struct accel_orientation acc_orient = {
+	/* Hinge aligns with x axis. */
+	.rot_hinge_90 = {
+		{ FLOAT_TO_FP(1),  0,  0},
+		{ 0,  0,  FLOAT_TO_FP(1)},
+		{ 0, FLOAT_TO_FP(-1),  0}
+	},
+	.rot_hinge_180 = {
+		{ FLOAT_TO_FP(1),  0,  0},
+		{ 0, FLOAT_TO_FP(-1),  0},
+		{ 0,  0, FLOAT_TO_FP(-1)}
+	},
+	.hinge_axis = {1, 0, 0},
+};
+
+/*
+ * In S3, power rail for sensors (+V3p3S) goes down asynchronous to EC. We need
+ * to execute this routine first and set the sensor state to "Not Initialized".
+ * This prevents the motion_sense_suspend hook routine from communicating with
+ * the sensor.
+ */
+static void motion_sensors_pre_init(void)
+{
+	struct motion_sensor_t *sensor;
+	int i;
+
+	for (i = 0; i < motion_sensor_count; ++i) {
+		sensor = &motion_sensors[i];
+		sensor->state = SENSOR_NOT_INITIALIZED;
+
+		sensor->runtime_config.odr = sensor->default_config.odr;
+		sensor->runtime_config.range = sensor->default_config.range;
+	}
+}
+DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, motion_sensors_pre_init,
+	MOTION_SENSE_HOOK_PRIO - 1);
diff --git a/board/kunimitsu/board.h b/board/kunimitsu/board.h
new file mode 100644
index 0000000000..5288471f83
--- /dev/null
+++ b/board/kunimitsu/board.h
@@ -0,0 +1,124 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Skylake Chrome Reference Design board configuration */
+
+#ifndef __BOARD_H
+#define __BOARD_H
+
+/* Optional features */
+#define CONFIG_SYSTEM_UNLOCKED  /* Allow dangerous commands */
+#define CONFIG_WATCHDOG_HELP
+#define CONFIG_CLOCK_CRYSTAL
+#define CONFIG_CHIPSET_SKYLAKE
+#define CONFIG_SCI_GPIO GPIO_PCH_SCI_L
+
+#define CONFIG_KEYBOARD_COL2_INVERTED
+#undef CONFIG_KEYBOARD_KSO_BASE
+#define CONFIG_KEYBOARD_KSO_BASE 0 /* KSO starts from KSO04 */
+#define CONFIG_KEYBOARD_PROTOCOL_8042
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_X86
+#define CONFIG_LID_SWITCH
+#define CONFIG_POWER_COMMON
+#define CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
+#define CONFIG_EXTPOWER_GPIO
+
+#define CONFIG_PORT80_TASK_EN
+
+#define CONFIG_SPI_PORT 1
+#define CONFIG_SPI_CS_GPIO GPIO_PVT_CS0
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SIZE 524288
+#define CONFIG_SPI_FLASH_W25Q64
+
+#define CONFIG_TEMP_SENSOR
+#define CONFIG_TEMP_SENSOR_TMP432
+
+#define CONFIG_ALS
+#define CONFIG_ALS_ISL29035
+#define CONFIG_CHARGER
+#define CONFIG_BATTERY_SMART
+#define CONFIG_CHARGER_V2
+#define CONFIG_CHARGER_BQ24770
+#define CONFIG_CHARGER_ILIM_PIN_DISABLED
+#define CONFIG_CHARGER_SENSE_RESISTOR 10
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
+#define CONFIG_CHARGER_INPUT_CURRENT 2240
+#define CONFIG_CHARGER_DISCHARGE_ON_AC
+
+#define CONFIG_I2C
+
+/* Accelerometer */
+#define CONFIG_ACCEL_KXCJ9
+#define CONFIG_CMD_ACCELS
+#define CONFIG_CMD_ACCEL_INFO
+#define CONFIG_LID_ANGLE
+#define CONFIG_SENSOR_BASE	0
+#define CONFIG_SENSOR_LID	1
+
+#define CONFIG_LID_ANGLE_SENSOR_LID	GPIO_GYRO_INT1
+#define CONFIG_LID_ANGLE_SENSOR_BASE	GPIO_GYRO_INT1
+
+/* Number of buttons */
+#define CONFIG_BUTTON_COUNT	2
+
+/* Modules we want to exclude */
+#undef CONFIG_EEPROM
+#undef CONFIG_EOPTION
+#undef CONFIG_PSTORE
+#undef CONFIG_PECI
+#undef CONFIG_FANS
+#undef CONFIG_ADC
+#undef CONFIG_WAKE_PIN
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+#include "registers.h"
+
+/* I2C ports */
+#define I2C_PORT_BATTERY	MEC1322_I2C0_0
+#define I2C_PORT_CHARGER	MEC1322_I2C0_0
+#define I2C_PORT_THERMAL	MEC1322_I2C0_0
+#define I2C_PORT_ACCEL		MEC1322_I2C2
+#define I2C_PORT_GYRO		MEC1322_I2C2
+#define I2C_PORT_ALS		MEC1322_I2C2
+
+/* power signal definitions */
+enum power_signal {
+	X86_RSMRST_L_PWRGD = 0,
+	X86_SLP_S0_DEASSERTED,
+	X86_SLP_S3_DEASSERTED,
+	X86_SLP_S4_DEASSERTED,
+	X86_SLP_SUS_DEASSERTED,
+	/* Number of X86 signals */
+	POWER_SIGNAL_COUNT
+};
+
+enum temp_sensor_id {
+	/* TMP432 local and remote sensors */
+	TEMP_SENSOR_I2C_TMP432_LOCAL,
+	TEMP_SENSOR_I2C_TMP432_REMOTE1,
+	TEMP_SENSOR_I2C_TMP432_REMOTE2,
+
+	/* Battery temperature sensor */
+	TEMP_SENSOR_BATTERY,
+
+	TEMP_SENSOR_COUNT
+};
+
+/* Light sensors */
+enum als_id {
+	ALS_ISL29035 = 0,
+
+	ALS_COUNT,
+};
+
+/* Discharge battery when on AC power for factory test. */
+int board_discharge_on_ac(int enable);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __BOARD_H */
diff --git a/board/kunimitsu/build.mk b/board/kunimitsu/build.mk
new file mode 100644
index 0000000000..51743a17c7
--- /dev/null
+++ b/board/kunimitsu/build.mk
@@ -0,0 +1,14 @@
+# -*- makefile -*-
+# Copyright 2015 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+# the IC is SMSC MEC1322 / external SPI is 512KB / external clock is crystal
+CHIP:=mec1322
+CHIP_SPI_SIZE_KB:=512
+
+board-y=board.o
+board-$(CONFIG_BATTERY_SMART)+=battery.o
diff --git a/board/kunimitsu/ec.tasklist b/board/kunimitsu/ec.tasklist
new file mode 100644
index 0000000000..d138cd9dd7
--- /dev/null
+++ b/board/kunimitsu/ec.tasklist
@@ -0,0 +1,29 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
+ * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
+ * where :
+ * 'n' in the name of the task
+ * 'r' in the main routine of the task
+ * 'd' in an opaque parameter passed to the routine at startup
+ * 's' is the stack size in bytes; must be a multiple of 8
+ */
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(MOTIONSENSE, motion_sense_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(PORT80, port80_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)
diff --git a/board/kunimitsu/gpio.inc b/board/kunimitsu/gpio.inc
new file mode 100644
index 0000000000..39698c5003
--- /dev/null
+++ b/board/kunimitsu/gpio.inc
@@ -0,0 +1,143 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+GPIO_INT(PCH_SLP_SUS_L,     PORT(1),  2, GPIO_INT_BOTH | GPIO_PULL_UP,              power_signal_interrupt) /* Deep sleep state */
+GPIO_INT(LID_OPEN,          PORT(2),  7, GPIO_INT_BOTH_DSLEEP,                      lid_interrupt)          /* Lid switch */
+GPIO_INT(AC_PRESENT,        PORT(3),  0, GPIO_INT_BOTH_DSLEEP,                      extpower_interrupt)     /* BC_ACOK / EC_ACIN - to know if battery or AC connected */
+GPIO_INT(VOLUME_UP_L,       PORT(3),  1, GPIO_INT_BOTH | GPIO_PULL_UP,              button_interrupt)       /* Volume up button */
+GPIO_INT(WP_L,              PORT(3),  3, GPIO_INT_BOTH,                             switch_interrupt)       /* Write protect input */
+GPIO_INT(POWER_BUTTON_L,    PORT(3),  5, GPIO_INT_BOTH_DSLEEP,                      power_button_interrupt) /* Power button */
+GPIO_INT(VOLUME_DOWN_L,     PORT(4),  7, GPIO_INT_BOTH | GPIO_PULL_UP,              button_interrupt)       /* Volume down button */
+GPIO_INT(PMIC_INT,          PORT(5),  0, GPIO_INT_FALLING,                          power_signal_interrupt) /* Alert signal from PMIC */
+GPIO_INT(PD_MCU_INT,        PORT(12), 2, GPIO_INT_RISING | GPIO_INT_DSLEEP,         pd_mcu_interrupt)       /* Interrupt from USB PD Controller to EC */
+GPIO_INT(RSMRST_L_PGOOD,    PORT(6),  3, GPIO_INT_BOTH,                             power_signal_interrupt) /* RSMRST_N_PWRGD from power logic */
+GPIO_INT(USB_C1_VBUS_WAKE,  PORT(12), 3, GPIO_INT_BOTH,                             vbus0_evt)              /* USB_C1_VBUS WAKE EVENT DETECT */
+GPIO_INT(USB_C0_BC12_INT_L, PORT(12), 4, GPIO_INT_FALLING,                          usb0_evt)               /* USB_C0_BC12_INT */
+#if defined(CONFIG_ACCEL_INTERRUPTS) && defined(CONFIG_SHARED_MOTION_INTERRUPT_LINE)
+GPIO_INT(GYRO_INT2,         PORT(12), 7, GPIO_INT_RISING | GPIO_PULL_DOWN,          motion_sns_interrupt)   /* Gyro sensor interrupt 2 to EC */
+#else
+GPIO_INT(GYRO_INT2,         PORT(12), 7, GPIO_INT_RISING | GPIO_PULL_DOWN,          NULL)                   /* Gyro sensor interrupt 2 to EC */
+#endif
+GPIO_INT(USB_C1_BC12_INT_L, PORT(14), 5, GPIO_INT_FALLING, usb1_evt)                                        /* USB_C1_BC12_INT */
+#ifdef CONFIG_ALS_INTERRUPTS
+GPIO_INT(ALS_INT,           PORT(14), 7, GPIO_INT_FALLING | GPIO_PULL_UP,           als_interrupt)          /* ALS sensor interrupt to EC */
+#else
+GPIO_INT(ALS_INT,           PORT(14), 7, GPIO_INT_FALLING | GPIO_PULL_UP,           NULL)                   /* ALS sensor interrupt to EC */
+#endif
+GPIO_INT(USB_C0_VBUS_WAKE,  PORT(15), 2, GPIO_INT_BOTH,                             vbus1_evt)              /* USBC PORT 0 VBUS POWER DETECT */
+#if defined(CONFIG_ACCEL_INTERRUPTS) && defined(CONFIG_SHARED_MOTION_INTERRUPT_LINE)
+GPIO_INT(GYRO_INT1,         PORT(16), 1, GPIO_INT_RISING | GPIO_PULL_DOWN,          motion_sns_interrupt)   /* Gyro sensor interrupt 1 to EC */
+#else
+GPIO_INT(GYRO_INT1,         PORT(16), 1, GPIO_INT_RISING | GPIO_PULL_DOWN,          NULL)                   /* Gyro sensor interrupt 1 to EC */
+#endif
+GPIO_INT(PCH_SLP_S4_L,      PORT(20), 0, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP,       power_signal_interrupt) /* SLP_S4# signal from PCH */
+GPIO_INT(PCH_SLP_S3_L,      PORT(20), 6, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP,       power_signal_interrupt) /* SLP_S3# signal from PCH */
+GPIO_INT(PCH_SLP_S0_L,      PORT(21), 1, GPIO_INT_BOTH | GPIO_PULL_UP,              power_signal_interrupt) /* Sleep SO signal from SOC to EC */
+
+GPIO(EC_BRD_ID0,        PORT(0),  6, GPIO_INPUT)                    /* EC_BRD_ID0 */
+GPIO(EC_BRD_ID1,        PORT(0),  7, GPIO_INPUT)                    /* EC_BRD_ID1 */
+
+GPIO(EC_BRD_ID2,        PORT(1),  0, GPIO_INPUT)                    /* EC_BRD_ID2 */
+GPIO(PP1800_DX_SENSOR_EN,PORT(1), 1, GPIO_OUT_LOW)
+GPIO(USB2_OTG_ID,       PORT(1),  3, GPIO_ODR_HIGH)                 /* Universal Serial Bus On-The-Go detection signal */
+GPIO(I2C_PORT0_SCL,     PORT(1),  5, GPIO_ODR_HIGH)
+GPIO(I2C_PORT0_SDA,     PORT(1),  6, GPIO_ODR_HIGH)
+
+GPIO(I2C_PORT2_SCL,     PORT(2),  0, GPIO_ODR_HIGH)
+GPIO(I2C_PORT2_SDA,     PORT(2),  1, GPIO_ODR_HIGH)
+GPIO(I2C_PORT1_SCL,     PORT(2),  2, GPIO_ODR_HIGH)
+GPIO(I2C_PORT1_SDA,     PORT(2),  3, GPIO_ODR_HIGH)
+GPIO(I2C_PORT3_SCL,     PORT(2),  4, GPIO_ODR_HIGH)
+GPIO(I2C_PORT3_SDA,     PORT(2),  5, GPIO_ODR_HIGH)
+GPIO(PCH_SCI_L,         PORT(2),  6, GPIO_ODR_HIGH)                 /* SCI output */
+
+GPIO(NC_034,            PORT(3),  4, GPIO_INPUT | GPIO_PULL_UP)     /* NC */
+GPIO(USB_P3_PWR_EN,     PORT(3),  6, GPIO_OUT_HIGH)                 /* Enable power for USB2 Port */
+
+GPIO(ENTERING_RW,       PORT(4),  1, GPIO_OUT_LOW)                  /* Indicate when EC is entering RW code */
+GPIO(PCH_SMI_L,         PORT(4),  4, GPIO_ODR_HIGH)                 /* SMI output */
+GPIO(PCH_PWRBTN_L,      PORT(4),  5, GPIO_OUT_HIGH)                 /* Power button output to PCH */
+GPIO(DDI1_HPD,          PORT(4),  6, GPIO_OUT_HIGH)                 /* DP hot plug detect from EC to SOC */
+
+GPIO(DDI2_HPD,          PORT(5),  1, GPIO_OUT_HIGH)                 /* DP hot plug detect from EC to SOC */
+GPIO(CPU_PROCHOT,       PORT(5),  2, GPIO_OPEN_DRAIN)
+GPIO(ENABLE_TOUCHPAD,   PORT(5),  3, GPIO_OUT_HIGH)                 /* Enable power to Track Pad */
+GPIO(ROP_DSW_PWROK,     PORT(5),  5, GPIO_INPUT)                    /* ZERO OHM DNP - RESERVED OPEN DRAIN */
+GPIO(BC_BATPRES,        PORT(5),  6, GPIO_INPUT)                    /* ?? */
+GPIO(V_BOOSTIN,         PORT(5),  7, GPIO_INPUT)                    /* ?? */
+
+GPIO(USBPD_WAKE,        PORT(6),  0, GPIO_OUT_LOW)                  /* USBC WAKE NOTIFICATION from MEC EC to STM32 EC */
+GPIO(BC_IBAT,           PORT(6),  1, GPIO_INPUT)                    /* ?? */
+GPIO(BC_MON,            PORT(6),  2, GPIO_INPUT)                    /* ADC FUNCTION - FROM BATTERY CHARGER FOR SYSTEM POWER MONITOR */
+GPIO(EN_USB_C0_CHARGE,  PORT(6),  4, GPIO_OUT_HIGH)                 /* Enable USB-C0 Charge */
+GPIO(FLASH_DSC_OVERRIDE,PORT(6),  5, GPIO_ODR_HIGH)                 /* Flash Descriptor Override */
+GPIO(PCH_WAKE_L,        PORT(6),  6, GPIO_ODR_HIGH)                 /* PCH wake pin */
+GPIO(USB_P4_PWR_EN,     PORT(6),  7, GPIO_OUT_HIGH)                 /* Enable power for USB3 Port */
+
+GPIO(KBD_KSO2,          PORT(10), 1, GPIO_KB_OUTPUT_COL2)           /* Negative edge triggered irq. */
+GPIO(FAN_TACH,          PORT(10), 5, GPIO_INPUT)                    /* ?? Need Alternate - FAN TACH */
+
+GPIO(AC_PRESENT_PCH,    PORT(11), 0, GPIO_ODR_HIGH)                 /*  */
+
+GPIO(SYS_RESET_L,       PORT(12), 1, GPIO_ODR_HIGH)                 /* PM_SYSRST - ODR High */
+GPIO(USB_PD_EC_INT,     PORT(12), 2, GPIO_INT_BOTH)                 /* Interrupt from USB PD Controller to EC */
+
+GPIO(EC_USBPD_RST,      PORT(13), 0, GPIO_ODR_HIGH)                 /* EC_USBPD_RST */
+GPIO(WLAN_OFF_L,        PORT(13), 2, GPIO_ODR_HIGH)                 /* Wireless LAN */
+GPIO(WWAN_PWR_EN,       PORT(13), 3, GPIO_OUT_HIGH)                 /* Enable power for WWAN */
+GPIO(PCH_RCIN_L,        PORT(13), 5, GPIO_ODR_HIGH)                 /* Reset line to PCH (for 8042 emulation) */
+
+GPIO(USB2_OTG_VBUSSENSE,PORT(14), 0, GPIO_ODR_HIGH)                 /* OTG VBUS STATUS TO PCH */
+GPIO(SEN_INT,           PORT(14), 1, GPIO_INT_BOTH_DSLEEP)          /* SEN_INT */
+GPIO(PCH_RSMRST_L,      PORT(14), 3, GPIO_OUT_LOW)                  /* RSMRST_N to PCH */
+GPIO(PVT_CS0,           PORT(14), 6, GPIO_ODR_HIGH)                 /* SPI PVT Chip select */
+
+GPIO(NC_150,            PORT(15), 0, GPIO_INPUT | GPIO_PULL_UP)     /* NC */
+GPIO(DEVICE_PROCHOT,    PORT(15), 1, GPIO_INT_FALLING)              /* Device Proc Hot */
+GPIO(EN_USB_C0_5V_OUT,  PORT(15), 4, GPIO_OUT_LOW)                  /* Enable USB-C0 5V */
+GPIO(CHARGE_LED1,       PORT(15), 5, GPIO_OUT_HIGH)                 /* Charge LED 1 */
+GPIO(CHARGE_LED2,       PORT(15), 6, GPIO_OUT_HIGH)                 /* Charge LED 2 */
+GPIO(EN_USB_C1_CHARGE,  PORT(15), 7, GPIO_OUT_HIGH)                 /* Enable USB-C1 Charge */
+
+GPIO(PP1800_DX_AUDIO_EN,PORT(16), 0, GPIO_OUT_LOW)
+GPIO(RTC_RST,           PORT(16), 3, GPIO_OPEN_DRAIN)               /* RTC_RST */
+
+GPIO(NC_201,            PORT(20), 1, GPIO_INPUT | GPIO_PULL_UP)     /* NC */
+GPIO(EC_BL_DISABLE_L,   PORT(20), 2, GPIO_OUT_HIGH)                 /* EDP backligh disable signal from EC */
+GPIO(PP3300_WLAN_EN,    PORT(20), 3, GPIO_OUT_HIGH)                 /* Enable power to wifi */
+GPIO(EN_USB_C1_5V_OUT,  PORT(20), 4, GPIO_OUT_LOW)                  /* Enable USB-C1 5V */
+
+GPIO(ROP_EC_1HZ_WAKE,   PORT(21), 0, GPIO_INT_BOTH)                 /* 1 HZ CLOCK FOR LOW POWER MODE FUNCTION */
+
+/* Alternate functions GPIO definition */
+ALTERNATE(PORT(16),     0x24,   1,      MODULE_UART,            0)                      /* UART0 */
+
+ALTERNATE(PORT(1),      0x60,   2,      MODULE_I2C,             GPIO_PULL_UP)           /* I2C0: Battery Charger */
+ALTERNATE(PORT(2),      0x3f,   2,      MODULE_I2C,             GPIO_PULL_UP)           /* I2C1: Temp Sensor / I2C2: SOC / I2C3: VNN */
+/* PORT SEL [3:0] has to be set to 1 to access this port 1 of controller 0 */
+ALTERNATE(PORT(13),     0x10,   2,      MODULE_I2C,             GPIO_PULL_UP)           /* I2C0 - Port 1 : Accel SCL  */
+ALTERNATE(PORT(1),      0x80,   2,      MODULE_I2C,             GPIO_PULL_UP)           /* I2C0 - Port 1 : Accel SDA*/
+
+ALTERNATE(PORT(0),      0x3d,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_OUTPUT)
+ALTERNATE(PORT(1),      0x02,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_OUTPUT)
+ALTERNATE(PORT(10),     0xdd,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_OUTPUT)
+ALTERNATE(PORT(3),      0x04,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_INPUT)
+ALTERNATE(PORT(4),      0x0d,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_INPUT)
+ALTERNATE(PORT(12),     0x60,   2,      MODULE_KEYBOARD_SCAN,   GPIO_KB_INPUT)
+ALTERNATE(PORT(14),     0x14,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_INPUT)
+
+ALTERNATE(PORT(1),      0x10,   1,      MODULE_LPC,             0)                      /* 14: CLKRUN# */
+ALTERNATE(PORT(11),     0x9e,   1,      MODULE_LPC,             0)                      /* 111~114: LAD[0:3], 117: PCI_CLK */
+ALTERNATE(PORT(11),     0x40,   1,      MODULE_LPC,             GPIO_INT_BOTH)          /* 116: LRESET# */
+ALTERNATE(PORT(12),     0x01,   1,      MODULE_LPC,             0)                      /* 120: LFRAME# */
+ALTERNATE(PORT(11),     0x20,   1,      MODULE_LPC,             0)
+
+ALTERNATE(PORT(5),      0x10,   1,      MODULE_SPI,             0)                      /* 54: MOSI */
+ALTERNATE(PORT(16),     0x10,   1,      MODULE_SPI,             0)                      /* 164: MISO */
+ALTERNATE(PORT(15),     0x08,   1,      MODULE_SPI,             0)                      /* 153: CLK */
+
+ALTERNATE(PORT(13),     0x40,   1,      MODULE_PWM_LED,         GPIO_OPEN_DRAIN)        /* 136: PWM1 */
diff --git a/board/kunimitsu/lfw/gpio.inc b/board/kunimitsu/lfw/gpio.inc
new file mode 100644
index 0000000000..d1bb19cfcb
--- /dev/null
+++ b/board/kunimitsu/lfw/gpio.inc
@@ -0,0 +1,16 @@
+/* -*- mode:c -*-
+ *
+ * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Minimal set of GPIOs needed for LFW loader
+ */
+
+GPIO(PVT_CS0,           PORT(14), 6, GPIO_ODR_HIGH)                 /* SPI PVT Chip select */
+
+/* Alternate functions GPIO definition */
+ALTERNATE(PORT(16),     0x24,   1,      MODULE_UART,            0)                      /* UART0 */
+ALTERNATE(PORT(5),      0x10,   1,      MODULE_SPI,             0)
+ALTERNATE(PORT(16),     0x10,   1,      MODULE_SPI,             0)
+ALTERNATE(PORT(15),     0x08,   1,      MODULE_SPI,             0)                      /* 153: CLK */