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authorVincent Palatin <vpalatin@chromium.org>2014-10-23 14:23:40 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-10-24 03:02:27 +0000
commit9adf64478f3328919a1cc9b0c47fcfab96e5b0f0 (patch)
tree05c6648a7302935c4a3f29b6784140952bc3b836
parente1a6096dbe6cbdd21bc5d1a9ee6759b516ddbc73 (diff)
downloadchrome-ec-9adf64478f3328919a1cc9b0c47fcfab96e5b0f0.tar.gz
pd: update DP mode signaling bits
A USB type-C to DisplayPort dongle can support either DPv1.3 or USB Gen 2 signaling. Our dongles need to advertise that they support DPv1.3 and only this. Our DFP needs to request DPv1.3 signaling. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:30645 TEST=Plug a type-C to DP dongle from another vendor to Samus and see a display output. Change-Id: Ie0ac16b675e86f635220a954a2c03442777cc527 Reviewed-on: https://chromium-review.googlesource.com/225250 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
-rw-r--r--board/dingdong/usb_pd_policy.c3
-rw-r--r--board/fruitpie/usb_pd_policy.c2
-rw-r--r--board/hoho/usb_pd_policy.c3
-rw-r--r--board/samus_pd/usb_pd_policy.c2
-rw-r--r--include/usb_pd.h19
5 files changed, 15 insertions, 14 deletions
diff --git a/board/dingdong/usb_pd_policy.c b/board/dingdong/usb_pd_policy.c
index 1751407cdc..b17e30fca2 100644
--- a/board/dingdong/usb_pd_policy.c
+++ b/board/dingdong/usb_pd_policy.c
@@ -129,8 +129,7 @@ const uint32_t vdo_dp_mode[1] = {
0, /* no src pin cfg */
1, /* no usb2.0 signalling in AMode */
CABLE_PLUG, /* its a plug */
- 0, /* no GEN2 usb */
- 0, /* no dp 1.3 support */
+ MODE_DP_V13, /* DPv1.3 Support, no Gen2 */
MODE_DP_SNK) /* Its a sink only */
};
diff --git a/board/fruitpie/usb_pd_policy.c b/board/fruitpie/usb_pd_policy.c
index f3e41b40c5..6caea5692f 100644
--- a/board/fruitpie/usb_pd_policy.c
+++ b/board/fruitpie/usb_pd_policy.c
@@ -219,7 +219,7 @@ static int svdm_dp_config(int port, uint32_t *payload)
payload[0] = VDO(USB_SID_DISPLAYPORT, 1, CMD_DP_CONFIG);
payload[1] = VDO_DP_CFG(MODE_DP_PIN_E, /* sink pins */
MODE_DP_PIN_E, /* src pins */
- 0, /* signalling unspec'd */
+ 1, /* DPv1.3 signaling */
2); /* UFP connected */
return 2;
};
diff --git a/board/hoho/usb_pd_policy.c b/board/hoho/usb_pd_policy.c
index ce4ee055a0..0e494a916b 100644
--- a/board/hoho/usb_pd_policy.c
+++ b/board/hoho/usb_pd_policy.c
@@ -129,8 +129,7 @@ const uint32_t vdo_dp_mode[1] = {
0, /* no src pin cfg */
1, /* no usb2.0 signalling in AMode */
CABLE_PLUG, /* its a plug */
- 0, /* no GEN2 usb */
- 0, /* no dp 1.3 support */
+ MODE_DP_V13, /* DPv1.3 Support, no Gen2 */
MODE_DP_SNK) /* Its a sink only */
};
diff --git a/board/samus_pd/usb_pd_policy.c b/board/samus_pd/usb_pd_policy.c
index 378c04033c..e8ffd2a886 100644
--- a/board/samus_pd/usb_pd_policy.c
+++ b/board/samus_pd/usb_pd_policy.c
@@ -270,7 +270,7 @@ static int svdm_dp_config(int port, uint32_t *payload)
payload[0] = VDO(USB_SID_DISPLAYPORT, 1, CMD_DP_CONFIG);
payload[1] = VDO_DP_CFG(MODE_DP_PIN_E, /* sink pins */
MODE_DP_PIN_E, /* src pins */
- 0, /* signalling unspec'd */
+ 1, /* DPv1.3 signaling */
2); /* UFP connected */
return 2;
};
diff --git a/include/usb_pd.h b/include/usb_pd.h
index 405f35024b..4518d2e88b 100644
--- a/include/usb_pd.h
+++ b/include/usb_pd.h
@@ -369,14 +369,14 @@ struct pd_policy {
* <15:8> : source pin assignment supported
* <7> : USB 2.0 signaling (0b=yes, 1b=no)
* <6> : Plug | Receptacle (0b == plug, 1b == receptacle)
- * <5:3> : USB Gen 2 signaling for DP (000b=no, 001b=yes, rest=rsv)
- * <2> : supports dp1.3
+ * <5:2> : xxx1: Supports DPv1.3, xx1x Supports USB Gen 2 signaling
+ * Other bits are reserved.
* <1:0> : signal direction ( 00b=rsv, 01b=sink, 10b=src 11b=both )
*/
-#define VDO_MODE_DP(snkp, srcp, usb, gdr, usbdp, dp3, sdir) \
+#define VDO_MODE_DP(snkp, srcp, usb, gdr, sign, sdir) \
(((snkp) & 0xff) << 16 | ((srcp) & 0xff) << 8 \
- | ((usb) & 1) << 7 | ((gdr) & 1) << 6 | ((usbdp) & 0x7) << 3 \
- | ((dp3) & 1) << 2 | ((sdir) & 0x3))
+ | ((usb) & 1) << 7 | ((gdr) & 1) << 6 | ((sign) & 0xF) << 2 \
+ | ((sdir) & 0x3))
#define MODE_DP_PIN_A 0x01
#define MODE_DP_PIN_B 0x02
@@ -384,6 +384,9 @@ struct pd_policy {
#define MODE_DP_PIN_D 0x08
#define MODE_DP_PIN_E 0x10
+#define MODE_DP_V13 0x1
+#define MODE_DP_GEN2 0x2
+
#define MODE_DP_SNK 0x1
#define MODE_DP_SRC 0x2
#define MODE_DP_BOTH 0x3
@@ -413,13 +416,13 @@ struct pd_policy {
* <23:16> : sink pin assignment supported (same as mode caps)
* <15:8> : source pin assignment supported (same as mode caps)
* <7:6> : SBZ
- * <5:2> : signalling : 0h == unspec'd, 1h == dp v1.3,
- * 2h == USB gen2, remaining rsv
+ * <5:2> : signalling : 1h == DP v1.3, 2h == Gen 2
+ * Oh is only for USB, remaining values are reserved
* <1:0> : cfg : 00 == USB, 01|10 == DP, 11 == reserved
*/
#define VDO_DP_CFG(snkp, srcp, sig, cfg) \
(((snkp) & 0xff) << 16 | ((srcp) & 0xff) << 8 \
- | ((sig) & 0x7) << 2 | ((cfg) & 0x3))
+ | ((sig) & 0xf) << 2 | ((cfg) & 0x3))
#define PD_DP_CFG_DPON(x) (((x & 0x3) == 1) || ((x & 0x3) == 2))
/*