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authorAlexandru M Stan <amstan@chromium.org>2014-09-17 15:58:39 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-09-19 19:46:47 +0000
commit6395dbea0c2ff1268db82c8bf3d2d03bbb8d05af (patch)
treec8c05f8bb0ad8d24595baa96859db00f7502205a
parent2be0577fe00c26cd99e7a7551e7157eff8c3998e (diff)
downloadchrome-ec-6395dbea0c2ff1268db82c8bf3d2d03bbb8d05af.tar.gz
stm32f0: Change uart clock to HSI
When waking up from sleep, the real CPU_CLOCK is a lie for a moment(since we cannot switch to the real clock during the first character) so the first character will be corrupted. The UART clock is now sourced from HSI(8MHz) which is available from the first moment after the cpu wakes up from sleep. BUG=None TEST=Console should work. When waking up(not implemented yet) it will also not lose a character BRANCH=None Change-Id: Ia12ed0634290f3edadfe3471b311759c3176260e Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/218728 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
-rw-r--r--chip/stm32/uart.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c
index 2e3d875243..6dec7e41e1 100644
--- a/chip/stm32/uart.c
+++ b/chip/stm32/uart.c
@@ -194,7 +194,20 @@ DECLARE_IRQ(STM32_IRQ_USART(UARTN), uart_interrupt, 2);
*/
static void uart_freq_change(void)
{
- int div = DIV_ROUND_NEAREST(clock_get_freq(), CONFIG_UART_BAUD_RATE);
+ int freq;
+ int div;
+
+#if defined(CHIP_FAMILY_STM32F0) && (UARTN <= 2)
+ /*
+ * UART is clocked from HSI (8MHz) to allow it to work when waking
+ * up from sleep
+ */
+ freq = 8000000;
+#else
+ /* UART clocked from the main clock */
+ freq = clock_get_freq();
+#endif
+ div = DIV_ROUND_NEAREST(freq, CONFIG_UART_BAUD_RATE);
#if defined(CHIP_FAMILY_STM32L) || defined(CHIP_FAMILY_STM32F0)
if (div / 16 > 0) {
@@ -223,6 +236,14 @@ DECLARE_HOOK(HOOK_FREQ_CHANGE, uart_freq_change, HOOK_PRIO_DEFAULT);
void uart_init(void)
{
/* Enable USART clock */
+#ifdef CHIP_FAMILY_STM32F0
+#if (UARTN == 1)
+ STM32_RCC_CFGR3 |= 0x0003; /* USART1 clock source from HSI(8MHz) */
+#elif (UARTN == 2)
+ STM32_RCC_CFGR3 |= 0x0300; /* USART2 clock source from HSI(8MHz) */
+#endif /* UARTN */
+#endif /* CHIP_FAMILY_STM32F0 */
+
#if (UARTN == 1)
STM32_RCC_APB2ENR |= STM32_RCC_PB2_USART1;
#else