diff options
| author | Alec Berg <alecaberg@chromium.org> | 2014-08-04 09:10:30 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-08-07 22:44:43 +0000 |
| commit | d4839198a724812a1e6effc49eb72ee422f01768 (patch) | |
| tree | 84cf3d690cabdf00c0cb9db1b153658816d32869 | |
| parent | bebad665af4d4f56e4ed1939adfb2e68b62c8f97 (diff) | |
| download | chrome-ec-d4839198a724812a1e6effc49eb72ee422f01768.tar.gz | |
samus_pd: add option to disallow PD communication in RO
Added a check for if we are in RO and write protect screw is
present which will stop the PD task to prevent PD communication.
By default this check is disabled since the p2 samus units do
not have access to WP screw. This check will need to be enabled
for EVT.
BUG=chrome-os-partner:31125
BRANCH=none
TEST=enabled the check, loaded on a p2 samus, and verified
that in RO, the console prints out "PD not allowed" and there
is no communication with an attached zinger. Then ran "sysjump
RW" and verified that power negotiation with zinger succeeded.
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Change-Id: I5007db659d8b057431426157a2150127b97a7b3f
Reviewed-on: https://chromium-review.googlesource.com/211020
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | board/samus_pd/board.c | 23 | ||||
| -rw-r--r-- | board/samus_pd/board.h | 2 |
2 files changed, 25 insertions, 0 deletions
diff --git a/board/samus_pd/board.c b/board/samus_pd/board.c index e623312e3a..8cedf23f1c 100644 --- a/board/samus_pd/board.c +++ b/board/samus_pd/board.c @@ -94,6 +94,7 @@ void board_config_pre_init(void) /* Initialize board. */ static void board_init(void) { + int pd_enable; int slp_s5 = gpio_get_level(GPIO_PCH_SLP_S5_L); int slp_s3 = gpio_get_level(GPIO_PCH_SLP_S3_L); @@ -123,6 +124,28 @@ static void board_init(void) /* Enable interrupts on PCH state change */ gpio_enable_interrupt(GPIO_PCH_SLP_S3_L); gpio_enable_interrupt(GPIO_PCH_SLP_S5_L); + + /* TODO(crosbug.com/p/31125): remove #if and keep #else for EVT */ +#if 1 + /* Enable PD communication */ + pd_enable = 1; +#else + /* + * Do not enable PD communication in RO as a security measure. + * We don't want to allow communication to outside world until + * we jump to RW. This can by overridden with the removal of + * the write protect screw to allow for easier testing, and for + * booting without a battery. + */ + if (system_get_image_copy() != SYSTEM_IMAGE_RW + && !gpio_get_level(GPIO_WP_L)) { + CPRINTF("[%T PD communication disabled]\n"); + pd_enable = 0; + } else { + pd_enable = 1; + } +#endif + pd_comm_enable(pd_enable); } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); diff --git a/board/samus_pd/board.h b/board/samus_pd/board.h index 329c3b7e03..a292bc5981 100644 --- a/board/samus_pd/board.h +++ b/board/samus_pd/board.h @@ -19,6 +19,8 @@ #define CONFIG_BOARD_PRE_INIT #define CONFIG_STM_HWTIMER32 #define CONFIG_USB_POWER_DELIVERY +#undef CONFIG_USB_PD_COMM_ENABLED +#define CONFIG_USB_PD_COMM_ENABLED 0 #define CONFIG_USB_PD_CUSTOM_VDM #define CONFIG_USB_PD_DUAL_ROLE #define CONFIG_USB_PD_INTERNAL_COMP |