samus_pd: PD configuration bug fixes

Fix bug to get PD transmit working. Fix config bug
for reading the CC ADCs.

BUG=chrome-os-partner:28350
BRANCH=none
TEST=connect fruitpie and samus via USB-C and run
pd dev on samus and pd charger on fruitpie.

Change-Id: Ic981a1f1e621ef4b69dedc61a02751346274aa4e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200159
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

3 files changed, 36 insertions, 22 deletions

diff --git a/board/samus_pd/board.c b/board/samus_pd/board.c
index c8184f75aa..561563a6e5 100644
--- a/board/samus_pd/board.c
+++ b/board/samus_pd/board.c
@@ -66,10 +66,10 @@ const struct gpio_info gpio_list[] = {
 	{"USB_C1_REF_PD_ODL",      GPIO_A, (1<<7),  GPIO_ODR_LOW,  NULL},
 
 	{"USB_C_CC_EN",            GPIO_C, (1<<10), GPIO_OUT_LOW,  NULL},
-	{"USB_C0_CC1_TX_EN",       GPIO_A, (1<<15), GPIO_OUT_HIGH, NULL},
-	{"USB_C0_CC2_TX_EN",       GPIO_E, (1<<12), GPIO_OUT_HIGH, NULL},
-	{"USB_C1_CC1_TX_EN",       GPIO_B, (1<<9),  GPIO_OUT_HIGH, NULL},
-	{"USB_C1_CC2_TX_EN",       GPIO_B, (1<<12), GPIO_OUT_HIGH, NULL},
+	{"USB_C0_CC1_TX_EN",       GPIO_A, (1<<15), GPIO_OUT_LOW, NULL},
+	{"USB_C0_CC2_TX_EN",       GPIO_E, (1<<12), GPIO_OUT_LOW, NULL},
+	{"USB_C1_CC1_TX_EN",       GPIO_B, (1<<9),  GPIO_OUT_LOW, NULL},
+	{"USB_C1_CC2_TX_EN",       GPIO_B, (1<<12), GPIO_OUT_LOW, NULL},
 
 #if 0
 	/* Alternate functions */
@@ -99,10 +99,10 @@ const struct gpio_info gpio_list[] = {
 	{"USB_C1_CC1_VCONN1_EN_L", GPIO_D, (1<<10), GPIO_OUT_HIGH, NULL},
 	{"USB_C1_CC2_VCONN1_EN_L", GPIO_D, (1<<11), GPIO_OUT_HIGH, NULL},
 
-	{"USB_C0_CC1_ODL",         GPIO_B, (1<<8),  GPIO_OUT_LOW,  NULL},
-	{"USB_C0_CC2_ODL",         GPIO_E, (1<<0),  GPIO_OUT_LOW,  NULL},
-	{"USB_C1_CC1_ODL",         GPIO_F, (1<<9),  GPIO_OUT_LOW,  NULL},
-	{"USB_C1_CC2_ODL",         GPIO_F, (1<<10), GPIO_OUT_LOW,  NULL},
+	{"USB_C0_CC1_ODL",         GPIO_B, (1<<8),  GPIO_ODR_LOW,  NULL},
+	{"USB_C0_CC2_ODL",         GPIO_E, (1<<0),  GPIO_ODR_LOW,  NULL},
+	{"USB_C1_CC1_ODL",         GPIO_F, (1<<9),  GPIO_ODR_LOW,  NULL},
+	{"USB_C1_CC2_ODL",         GPIO_F, (1<<10), GPIO_ODR_LOW,  NULL},
 
 	{"USB_C_BC12_SEL",         GPIO_C, (1<<0),  GPIO_OUT_LOW,  NULL},
 	{"USB_C0_SS1_EN_L",        GPIO_E, (1<<2),  GPIO_OUT_HIGH, NULL},
@@ -181,8 +181,8 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
 
 /* Pins with alternate functions */
 const struct gpio_alt_func gpio_alt_funcs[] = {
-	{GPIO_B, 0x0018, 0, MODULE_USB_PD},/* SPI1: MISO(PB4) SCK(PB3) */
-	{GPIO_B, 0x6000, 0, MODULE_USB_PD},/* SPI2: MISO(PB14) SCK(PB13) */
+	{GPIO_B, 0x0008, 0, MODULE_USB_PD},/* SPI1: SCK(PB3) */
+	{GPIO_B, 0x2000, 0, MODULE_USB_PD},/* SPI2: SCK(PB13) */
 	{GPIO_B, 0x0002, 0, MODULE_USB_PD},/* TIM14_CH1: PB1) */
 	{GPIO_E, 0x0002, 0, MODULE_USB_PD},/* TIM17_CH1: PE1) */
 	{GPIO_A, 0x0600, 1, MODULE_UART},  /* USART1: PA9/PA10 */
@@ -196,8 +196,8 @@ const int gpio_alt_funcs_count = ARRAY_SIZE(gpio_alt_funcs);
 const struct adc_t adc_channels[] = {
 	/* USB PD CC lines sensing. Converted to mV (3300mV/4096). */
 	[ADC_C0_CC1_PD] = {"C0_CC1_PD", 3300, 4096, 0, STM32_AIN(0)},
-	[ADC_C0_CC2_PD] = {"C0_CC2_PD", 3300, 4096, 0, STM32_AIN(4)},
 	[ADC_C1_CC1_PD] = {"C1_CC1_PD", 3300, 4096, 0, STM32_AIN(2)},
+	[ADC_C0_CC2_PD] = {"C0_CC2_PD", 3300, 4096, 0, STM32_AIN(4)},
 	[ADC_C1_CC2_PD] = {"C1_CC2_PD", 3300, 4096, 0, STM32_AIN(5)},
 };
 BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
diff --git a/board/samus_pd/board.h b/board/samus_pd/board.h
index 5810eadd8e..024b27bc6e 100644
--- a/board/samus_pd/board.h
+++ b/board/samus_pd/board.h
@@ -169,8 +169,8 @@ enum gpio_signal {
 /* ADC signal */
 enum adc_channel {
 	ADC_C0_CC1_PD = 0,
-	ADC_C0_CC2_PD,
 	ADC_C1_CC1_PD,
+	ADC_C0_CC2_PD,
 	ADC_C1_CC2_PD,
 	/* Number of ADC channels */
 	ADC_CH_COUNT
diff --git a/board/samus_pd/usb_pd_config.h b/board/samus_pd/usb_pd_config.h
index 502ad3dfd9..9606913e06 100644
--- a/board/samus_pd/usb_pd_config.h
+++ b/board/samus_pd/usb_pd_config.h
@@ -21,7 +21,7 @@
 
 static inline void spi_enable_clock(void)
 {
-	STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2;
+	STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1;
 }
 
 /* RX is using COMP1 triggering TIM1 CH1 */
@@ -39,21 +39,35 @@ static inline void pd_set_pins_speed(void)
 	/* 40 MHz pin speed on SPI PB3/4/5 */
 	STM32_GPIO_OSPEEDR(GPIO_B) |= 0x00000FC0;
 	/* 40 MHz pin speed on TIM14_CH1 (PB1) */
-	STM32_GPIO_OSPEEDR(GPIO_B) |= 0x000000C0;
+	STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000000C;
 }
 
 /* Drive the CC line from the TX block */
 static inline void pd_tx_enable(int polarity)
 {
-	gpio_set_level(GPIO_USB_C0_CC1_TX_EN, 1);
-	gpio_set_level(GPIO_USB_C0_CC2_TX_EN, 1);
+	/* set the low level reference */
+	gpio_set_level(polarity ? GPIO_USB_C0_CC2_TX_EN :
+					GPIO_USB_C0_CC1_TX_EN, 1);
+
+	/* put SPI function on TX pin */
+	if (polarity) /* PE14 is SPI1 MISO */
+		gpio_set_alternate_function(GPIO_E, 0x4000, 1);
+	else /* PB4 is SPI1 MISO */
+		gpio_set_alternate_function(GPIO_B, 0x0010, 0);
 }
 
 /* Put the TX driver in Hi-Z state */
 static inline void pd_tx_disable(int polarity)
 {
-	gpio_set_level(GPIO_USB_C0_CC1_TX_EN, 0);
-	gpio_set_level(GPIO_USB_C0_CC2_TX_EN, 0);
+	/* put SPI TX in Hi-Z */
+	if (polarity) /* PE14 is SPI1 MISO */
+		gpio_set_alternate_function(GPIO_E, 0x4000, -1);
+	else /* PB4 is SPI1 MISO */
+		gpio_set_alternate_function(GPIO_B, 0x0010, -1);
+
+	/* put the low level reference in Hi-Z */
+	gpio_set_level(polarity ? GPIO_USB_C0_CC2_TX_EN :
+					GPIO_USB_C0_CC1_TX_EN, 0);
 }
 
 /* we know the plug polarity, do the right configuration */
@@ -76,12 +90,12 @@ static inline void pd_set_host_mode(int enable)
 {
 	if (enable) {
 		/* High-Z is used for host mode. */
-		gpio_set_flags(GPIO_USB_C0_CC1_ODL, GPIO_INPUT);
-		gpio_set_flags(GPIO_USB_C0_CC2_ODL, GPIO_INPUT);
+		gpio_set_level(GPIO_USB_C0_CC1_ODL, 1);
+		gpio_set_level(GPIO_USB_C0_CC2_ODL, 1);
 	} else {
 		/* Pull low for device mode. */
-		gpio_set_flags(GPIO_USB_C0_CC1_ODL, GPIO_OUT_LOW);
-		gpio_set_flags(GPIO_USB_C0_CC2_ODL, GPIO_OUT_LOW);
+		gpio_set_level(GPIO_USB_C0_CC1_ODL, 0);
+		gpio_set_level(GPIO_USB_C0_CC2_ODL, 0);
 	}
 
 }