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authorRandall Spangler <rspangler@chromium.org>2014-02-05 13:49:16 -0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-02-06 19:27:14 +0000
commit66eec4415a0cf8a74aa9dd26c957423b63681e6b (patch)
tree07d3b9f684027391c3b25fa387e94736139f6863
parentfc054b4899c73d19599aa3cbdf3e8b0d05bf785d (diff)
downloadchrome-ec-66eec4415a0cf8a74aa9dd26c957423b63681e6b.tar.gz
baytrail: reduce delay before SYS_PWROK assertion to 5 ms
Since we have only mini-PCIe devices, and no PCIe devices, we don't need a 100 ms delay. BUG=chrome-os-partner:25264 BRANCH=rambi TEST=boot system; AP boots normally Change-Id: I3dd537154d70b8379ebc36cb71474420cba43d7d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/185046 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--power/baytrail.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/power/baytrail.c b/power/baytrail.c
index 4580bfa34f..2d4aba1a36 100644
--- a/power/baytrail.c
+++ b/power/baytrail.c
@@ -267,8 +267,11 @@ enum power_state power_handle_state(enum power_state state)
*/
disable_sleep(SLEEP_MASK_AP_RUN);
- /* Wait 100ms after all voltages good */
- msleep(100);
+ /*
+ * Wait 5 ms after all voltages good. 100 ms is only needed
+ * for PCIe devices; mini-PCIe devices should need only 1 ms.
+ */
+ msleep(5);
/*
* Throttle CPU if necessary. This should only be asserted