diff options
| author | Sam McNally <sammc@chromium.org> | 2023-02-21 11:47:35 +1100 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-02-21 08:53:34 +0000 |
| commit | 15fe4369eee45b6c84b8c4d3cd539f2926e62193 (patch) | |
| tree | 57173e813b5aeff626da7031091661e6e4aa24c0 | |
| parent | 497a25b4185deb0143bc2c6963552643d824bc26 (diff) | |
| download | chrome-ec-15fe4369eee45b6c84b8c4d3cd539f2926e62193.tar.gz | |
dibbi: Update EN_PPVAR_BJ_ADP_OD and its uses.
It should be open-drain, and the logic has been inverted since the
original definition.
BUG=none
TEST=none
BRANCH=none
Change-Id: I78092db8314baa512589a79bfe538fb4401f4cab
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4273905
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
| -rw-r--r-- | board/dibbi/board.c | 4 | ||||
| -rw-r--r-- | board/dibbi/gpio.inc | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/board/dibbi/board.c b/board/dibbi/board.c index 6f5f2c0070..5c82a465fa 100644 --- a/board/dibbi/board.c +++ b/board/dibbi/board.c @@ -313,13 +313,13 @@ int board_set_active_charge_port(int port) switch (port) { case CHARGE_PORT_TYPEC0: ppc_vbus_sink_enable(USBC_PORT_C0, 1); - gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_OD, 1); + gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_OD, 0); break; case CHARGE_PORT_BARRELJACK: /* Make sure BJ adapter is sourcing power */ if (!gpio_get_level(GPIO_BJ_ADP_PRESENT)) return EC_ERROR_INVAL; - gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_OD, 0); + gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_OD, 1); ppc_vbus_sink_enable(USBC_PORT_C0, 1); break; default: diff --git a/board/dibbi/gpio.inc b/board/dibbi/gpio.inc index 9358ef782a..b6af667715 100644 --- a/board/dibbi/gpio.inc +++ b/board/dibbi/gpio.inc @@ -58,7 +58,7 @@ GPIO(EN_VCCIO_EXT, PIN(B, 2), GPIO_OUT_LOW) GPIO(EC_PROCHOT_ODL, PIN(I, 1), GPIO_ODR_HIGH | GPIO_SEL_1P8V) GPIO(EC_AP_VCCST_PWRGD_OD, PIN(E, 5), GPIO_ODR_LOW) GPIO(ALL_SYS_PWRGD, PIN(B, 7), GPIO_OUT_LOW) -GPIO(EN_PPVAR_BJ_ADP_OD, PIN(E, 3), GPIO_OUT_LOW) +GPIO(EN_PPVAR_BJ_ADP_OD, PIN(E, 3), GPIO_ODR_HIGH) GPIO(ACK_PPVAR_BJ_ADP_ODL, PIN(A, 0), GPIO_INPUT) /* Required for icelake chipset code, but implemented through other means for dedede */ |