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| author | Eric Yilun Lin <yllin@chromium.org> | 2023-02-20 14:31:13 +0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-02-21 03:55:34 +0000 |
| commit | 2bdb7720879073cc217d1044a90507e5cc07941d (patch) | |
| tree | dea7907b79dc810e8c7d2ec1a75d4dd937edb893 | |
| parent | 918adbbd6373a7ee5967182fd4f8d58c47eeed15 (diff) | |
| download | chrome-ec-2bdb7720879073cc217d1044a90507e5cc07941d.tar.gz | |
mt8186,mt8188: disable IN_AP_SUSPEND interrupt in G3/S5
GPIO_AP_IN_SLEEP_L will be floating when the AP off, so only enable
the interrupt when AP is on.
Also, drop the unnecessary interrupt enables, which should have done
in power_common_init().
BUG=none
TEST=AP suspend, and AP_IN_SLEEP_L is captured by the powerindebug
BRANCH=none
Change-Id: I496c2a4a0b7d7e2f18d8c14945f67d91878ac045
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4269796
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
| -rw-r--r-- | power/mt8186.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/power/mt8186.c b/power/mt8186.c index ac2866348a..16345ae2a8 100644 --- a/power/mt8186.c +++ b/power/mt8186.c @@ -249,14 +249,8 @@ enum power_state power_chipset_init(void) int exit_hard_off = 1; enum power_state init_state = power_get_signal_state(); - /* Enable reboot / sleep control inputs from AP */ - gpio_enable_interrupt(GPIO_AP_IN_SLEEP_L); - gpio_enable_interrupt(GPIO_AP_EC_SYSRST_ODL); - if (system_jumped_late()) { if (init_state == POWER_S0) { - gpio_enable_interrupt(GPIO_AP_EC_WDTRST_L); - gpio_enable_interrupt(GPIO_AP_EC_WARM_RST_REQ); disable_sleep(SLEEP_MASK_AP_RUN); CPRINTS("already in S0"); } @@ -274,8 +268,6 @@ enum power_state power_chipset_init(void) exit_hard_off = 0; } else if (system_get_reset_flags() & EC_RESET_FLAG_AP_IDLE) { if (init_state == POWER_S0) { - gpio_enable_interrupt(GPIO_AP_EC_WDTRST_L); - gpio_enable_interrupt(GPIO_AP_EC_WARM_RST_REQ); disable_sleep(SLEEP_MASK_AP_RUN); } @@ -349,8 +341,9 @@ enum power_state power_handle_state(enum power_state state) is_exiting_off = false; hook_notify(HOOK_CHIPSET_PRE_INIT); - gpio_enable_interrupt(GPIO_AP_EC_WARM_RST_REQ); - gpio_enable_interrupt(GPIO_AP_EC_WDTRST_L); + power_signal_enable_interrupt(GPIO_AP_IN_SLEEP_L); + power_signal_enable_interrupt(GPIO_AP_EC_WDTRST_L); + power_signal_enable_interrupt(GPIO_AP_EC_WARM_RST_REQ); #if DT_NODE_EXISTS(DT_NODELABEL(en_pp4200_s5)) gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_pp4200_s5), 1); @@ -441,8 +434,9 @@ enum power_state power_handle_state(enum power_state state) return POWER_S3; case POWER_S3S5: - gpio_disable_interrupt(GPIO_AP_EC_WDTRST_L); - gpio_disable_interrupt(GPIO_AP_EC_WARM_RST_REQ); + power_signal_disable_interrupt(GPIO_AP_IN_SLEEP_L); + power_signal_disable_interrupt(GPIO_AP_EC_WDTRST_L); + power_signal_disable_interrupt(GPIO_AP_EC_WARM_RST_REQ); /* Call hooks before we remove power rails */ hook_notify(HOOK_CHIPSET_SHUTDOWN); |