diff options
| author | Jes B. Klinke <jbk@chromium.org> | 2022-09-12 15:49:14 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-09-14 17:00:14 +0000 |
| commit | 2fe31fce24306774ccd6d18e8ba7a3cec0c023e1 (patch) | |
| tree | 4fd1d472af802fa1b61b214ee4bfb4c43aff4039 | |
| parent | 6315e187bdb783569447799018b5cbcdd800e2fe (diff) | |
| download | chrome-ec-2fe31fce24306774ccd6d18e8ba7a3cec0c023e1.tar.gz | |
board/hyperdebug: Update pin assignment
The OpenTitan project has decided to use the four Nucleo connectors
CN7-10 instead of the larger ones CN11-12, which are unpopulated from
the factory. This required a reassignment of all the IO signals.
BUG=b:192262089
TEST=Manually apply voltage to each physical pin in turn, observing gpioget.
Change-Id: I2aaba0298d84370d0cdf5d5f3d19bee77c3c9b5f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3892574
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Jes Klinke <jbk@chromium.org>
Tested-by: Jes Klinke <jbk@chromium.org>
| -rw-r--r-- | board/hyperdebug/board.c | 86 | ||||
| -rw-r--r-- | board/hyperdebug/board.h | 30 | ||||
| -rw-r--r-- | board/hyperdebug/gpio.inc | 297 |
3 files changed, 204 insertions, 209 deletions
diff --git a/board/hyperdebug/board.c b/board/hyperdebug/board.c index 49ed4551f4..638a5a29bc 100644 --- a/board/hyperdebug/board.c +++ b/board/hyperdebug/board.c @@ -34,27 +34,6 @@ void board_config_pre_init(void) #define USB_STREAM_TX_SIZE 16 /****************************************************************************** - * Forward USART1 as a simple USB serial interface. - */ - -static struct usart_config const usart1; -struct usb_stream_config const usart1_usb; - -static struct queue const usart1_to_usb = - QUEUE_DIRECT(64, uint8_t, usart1.producer, usart1_usb.consumer); -static struct queue const usb_to_usart1 = - QUEUE_DIRECT(64, uint8_t, usart1_usb.producer, usart1.consumer); - -static struct usart_config const usart1 = - USART_CONFIG(usart1_hw, usart_rx_interrupt, usart_tx_interrupt, 115200, - 0, usart1_to_usb, usb_to_usart1); - -USB_STREAM_CONFIG(usart1_usb, USB_IFACE_USART1_STREAM, - USB_STR_USART1_STREAM_NAME, USB_EP_USART1_STREAM, - USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, usb_to_usart1, - usart1_to_usb) - -/****************************************************************************** * Forward USART2 as a simple USB serial interface. */ @@ -76,6 +55,27 @@ USB_STREAM_CONFIG(usart2_usb, USB_IFACE_USART2_STREAM, usart2_to_usb) /****************************************************************************** + * Forward USART3 as a simple USB serial interface. + */ + +static struct usart_config const usart3; +struct usb_stream_config const usart3_usb; + +static struct queue const usart3_to_usb = + QUEUE_DIRECT(64, uint8_t, usart3.producer, usart3_usb.consumer); +static struct queue const usb_to_usart3 = + QUEUE_DIRECT(64, uint8_t, usart3_usb.producer, usart3.consumer); + +static struct usart_config const usart3 = + USART_CONFIG(usart3_hw, usart_rx_interrupt, usart_tx_interrupt, 115200, + 0, usart3_to_usb, usb_to_usart3); + +USB_STREAM_CONFIG(usart3_usb, USB_IFACE_USART3_STREAM, + USB_STR_USART3_STREAM_NAME, USB_EP_USART3_STREAM, + USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, usb_to_usart3, + usart3_to_usb) + +/****************************************************************************** * Forward USART4 as a simple USB serial interface. */ @@ -97,25 +97,25 @@ USB_STREAM_CONFIG(usart4_usb, USB_IFACE_USART4_STREAM, usart4_to_usb) /****************************************************************************** - * Forward LPUART (USART9) as a simple USB serial interface. + * Forward USART5 as a simple USB serial interface. */ -static struct usart_config const usart9; -struct usb_stream_config const usart9_usb; +static struct usart_config const usart5; +struct usb_stream_config const usart5_usb; -static struct queue const usart9_to_usb = - QUEUE_DIRECT(64, uint8_t, usart9.producer, usart9_usb.consumer); -static struct queue const usb_to_usart9 = - QUEUE_DIRECT(64, uint8_t, usart9_usb.producer, usart9.consumer); +static struct queue const usart5_to_usb = + QUEUE_DIRECT(64, uint8_t, usart5.producer, usart5_usb.consumer); +static struct queue const usb_to_usart5 = + QUEUE_DIRECT(64, uint8_t, usart5_usb.producer, usart5.consumer); -static struct usart_config const usart9 = - USART_CONFIG(usart9_hw, usart_rx_interrupt, usart_tx_interrupt, 115200, - 0, usart9_to_usb, usb_to_usart9); +static struct usart_config const usart5 = + USART_CONFIG(usart5_hw, usart_rx_interrupt, usart_tx_interrupt, 115200, + 0, usart5_to_usb, usb_to_usart5); -USB_STREAM_CONFIG(usart9_usb, USB_IFACE_USART9_STREAM, - USB_STR_USART9_STREAM_NAME, USB_EP_USART9_STREAM, - USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, usb_to_usart9, - usart9_to_usb) +USB_STREAM_CONFIG(usart5_usb, USB_IFACE_USART5_STREAM, + USB_STR_USART5_STREAM_NAME, USB_EP_USART5_STREAM, + USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, usb_to_usart5, + usart5_to_usb) /****************************************************************************** * Support SPI bridging over USB, this requires usb_spi_board_enable and @@ -194,10 +194,10 @@ const void *const usb_strings[] = { [USB_STR_CONSOLE_NAME] = USB_STRING_DESC("HyperDebug Shell"), [USB_STR_SPI_NAME] = USB_STRING_DESC("SPI"), [USB_STR_I2C_NAME] = USB_STRING_DESC("I2C"), - [USB_STR_USART1_STREAM_NAME] = USB_STRING_DESC("UART1"), [USB_STR_USART2_STREAM_NAME] = USB_STRING_DESC("UART2"), + [USB_STR_USART3_STREAM_NAME] = USB_STRING_DESC("UART3"), [USB_STR_USART4_STREAM_NAME] = USB_STRING_DESC("UART4"), - [USB_STR_USART9_STREAM_NAME] = USB_STRING_DESC("UART9"), + [USB_STR_USART5_STREAM_NAME] = USB_STRING_DESC("UART5"), }; BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT); @@ -214,21 +214,21 @@ static void board_init(void) STM32_PWR_CR2 |= STM32_PWR_CR2_IOSV; /* USB to serial queues */ - queue_init(&usart1_to_usb); - queue_init(&usb_to_usart1); queue_init(&usart2_to_usb); queue_init(&usb_to_usart2); + queue_init(&usart3_to_usb); + queue_init(&usb_to_usart3); queue_init(&usart4_to_usb); queue_init(&usb_to_usart4); - queue_init(&usart9_to_usb); - queue_init(&usb_to_usart9); + queue_init(&usart5_to_usb); + queue_init(&usb_to_usart5); STM32_GPIO_BSRR(STM32_GPIOE_BASE) |= 0x0F000000; /* UART init */ - usart_init(&usart1); usart_init(&usart2); + usart_init(&usart3); usart_init(&usart4); - usart_init(&usart9); + usart_init(&usart5); /* Structured endpoints */ usb_spi_enable(&usb_spi, 1); diff --git a/board/hyperdebug/board.h b/board/hyperdebug/board.h index 2ebc8467a1..9d15311784 100644 --- a/board/hyperdebug/board.h +++ b/board/hyperdebug/board.h @@ -18,20 +18,20 @@ #define CONFIG_ROM_BASE 0x0 #define CONFIG_ROM_SIZE (CONFIG_RAM_BASE - CONFIG_ROM_BASE) -/* Enable USB forwarding on UART 1, 2, 4 and the LPUART (UART9) */ +/* Enable USB forwarding on UART 2, 3, 4, and 5. */ #define CONFIG_STREAM_USART -#define CONFIG_STREAM_USART1 +#undef CONFIG_STREAM_USART1 #define CONFIG_STREAM_USART2 -#undef CONFIG_STREAM_USART3 +#define CONFIG_STREAM_USART3 #define CONFIG_STREAM_USART4 -#undef CONFIG_STREAM_USART5 -#define CONFIG_STREAM_USART9 +#define CONFIG_STREAM_USART5 +#undef CONFIG_STREAM_USART9 #define CONFIG_STREAM_USB #define CONFIG_CMD_USART_INFO -/* The UART console is on UART3 */ +/* The UART console is on LPUART (UART9), connected to st-link debugger. */ #undef CONFIG_UART_CONSOLE -#define CONFIG_UART_CONSOLE 3 +#define CONFIG_UART_CONSOLE 9 #undef CONFIG_UART_TX_DMA #undef CONFIG_UART_RX_DMA @@ -69,10 +69,10 @@ #define USB_IFACE_CONSOLE 0 #define USB_IFACE_SPI 1 #define USB_IFACE_I2C 2 -#define USB_IFACE_USART1_STREAM 3 -#define USB_IFACE_USART2_STREAM 4 +#define USB_IFACE_USART2_STREAM 3 +#define USB_IFACE_USART3_STREAM 4 #define USB_IFACE_USART4_STREAM 5 -#define USB_IFACE_USART9_STREAM 6 +#define USB_IFACE_USART5_STREAM 6 #define USB_IFACE_COUNT 7 /* USB endpoint indexes (use define rather than enum to expand them) */ @@ -80,10 +80,10 @@ #define USB_EP_CONSOLE 1 #define USB_EP_SPI 2 #define USB_EP_I2C 3 -#define USB_EP_USART1_STREAM 4 -#define USB_EP_USART2_STREAM 5 +#define USB_EP_USART2_STREAM 4 +#define USB_EP_USART3_STREAM 5 #define USB_EP_USART4_STREAM 6 -#define USB_EP_USART9_STREAM 7 +#define USB_EP_USART5_STREAM 7 #define USB_EP_COUNT 8 /* @@ -141,10 +141,10 @@ enum usb_strings { USB_STR_CONSOLE_NAME, USB_STR_SPI_NAME, USB_STR_I2C_NAME, - USB_STR_USART1_STREAM_NAME, USB_STR_USART2_STREAM_NAME, + USB_STR_USART3_STREAM_NAME, USB_STR_USART4_STREAM_NAME, - USB_STR_USART9_STREAM_NAME, + USB_STR_USART5_STREAM_NAME, USB_STR_COUNT }; diff --git a/board/hyperdebug/gpio.inc b/board/hyperdebug/gpio.inc index 290118edfc..5dc0cebc1b 100644 --- a/board/hyperdebug/gpio.inc +++ b/board/hyperdebug/gpio.inc @@ -12,162 +12,157 @@ * special functions are commented out, and declared with relevant * symbolic name further below. */ -GPIO(CN11_1, PIN(C, 10), GPIO_INPUT) -GPIO(CN11_2, PIN(C, 11), GPIO_INPUT) -GPIO(CN11_3, PIN(C, 12), GPIO_INPUT) -GPIO(CN11_4, PIN(D, 2), GPIO_INPUT) -GPIO(CN11_7, PIN(H, 3), GPIO_INPUT) -GPIO(CN11_9, PIN(F, 6), GPIO_INPUT) -GPIO(CN11_11, PIN(F, 7), GPIO_INPUT) -/*GPIO(CN11_13, PIN(A, 13), GPIO_INPUT) SWDIO */ -/*GPIO(CN11_15, PIN(A, 14), GPIO_INPUT) SWCLK */ -GPIO(CN11_17, PIN(A, 15), GPIO_INPUT) -/*GPIO(CN11_21, PIN(B, 7), GPIO_INPUT) Nucleo LED */ -GPIO(CN11_23, PIN(C, 13), GPIO_INPUT) -GPIO(CN11_25, PIN(C, 14), GPIO_INPUT) -GPIO(CN11_27, PIN(C, 15), GPIO_INPUT) -/*GPIO(CN11_28, PIN(A, 0), GPIO_INPUT) UART4 */ -GPIO(CN11_29, PIN(H, 0), GPIO_INPUT) -/*GPIO(CN11_30, PIN(A, 1), GPIO_INPUT) UART4 */ -GPIO(CN11_31, PIN(H, 1), GPIO_INPUT) -/*GPIO(CN11_32, PIN(A, 4), GPIO_INPUT) USB CC */ -GPIO(CN11_34, PIN(B, 0), GPIO_INPUT) -/*GPIO(CN11_35, PIN(C, 2), GPIO_INPUT) SPI2 */ -GPIO(CN11_36, PIN(C, 1), GPIO_INPUT) -/*GPIO(CN11_37, PIN(C, 3), GPIO_INPUT) SPI2 */ -GPIO(CN11_38, PIN(C, 0), GPIO_INPUT) -GPIO(CN11_39, PIN(D, 4), GPIO_INPUT) -GPIO(CN11_40, PIN(D, 3), GPIO_INPUT) -GPIO(CN11_41, PIN(D, 5), GPIO_INPUT) -GPIO(CN11_42, PIN(G, 2), GPIO_INPUT) -GPIO(CN11_43, PIN(D, 6), GPIO_INPUT) -GPIO(CN11_44, PIN(G, 3), GPIO_INPUT) -GPIO(CN11_45, PIN(D, 7), GPIO_INPUT) -GPIO(CN11_46, PIN(E, 2), GPIO_INPUT) -GPIO(CN11_47, PIN(E, 3), GPIO_INPUT) -GPIO(CN11_48, PIN(E, 4), GPIO_INPUT) -GPIO(CN11_50, PIN(E, 5), GPIO_INPUT) -GPIO(CN11_51, PIN(F, 1), GPIO_INPUT) -GPIO(CN11_52, PIN(F, 2), GPIO_INPUT) -GPIO(CN11_53, PIN(F, 0), GPIO_INPUT) -GPIO(CN11_54, PIN(F, 8), GPIO_INPUT) -/*GPIO(CN11_55, PIN(D, 1), GPIO_INPUT) SPI2 */ -GPIO(CN11_56, PIN(F, 9), GPIO_INPUT) -/*GPIO(CN11_57, PIN(D, 0), GPIO_INPUT) SPI2 */ -GPIO(CN11_58, PIN(G, 1), GPIO_INPUT) -GPIO(CN11_59, PIN(G, 0), GPIO_INPUT) -/*GPIO(CN11_61, PIN(E, 1), GPIO_INPUT) */ -GPIO(CN11_62, PIN(E, 6), GPIO_INPUT) -/*GPIO(CN11_63, PIN(G, 9), GPIO_INPUT) UART1 */ -GPIO(CN11_64, PIN(G, 15), GPIO_INPUT) -GPIO(CN11_65, PIN(G, 12), GPIO_INPUT) -/*GPIO(CN11_66, PIN(G, 10), GPIO_INPUT) UART1 */ -/*GPIO(CN11_68, PIN(G, 13), GPIO_INPUT) I2C1 */ -/*GPIO(CN11_69, PIN(D, 9), GPIO_INPUT) UART3 */ -GPIO(CN12_1, PIN(C, 9), GPIO_INPUT) -GPIO(CN12_2, PIN(C, 8), GPIO_INPUT) -GPIO(CN12_3, PIN(B, 8), GPIO_INPUT) -GPIO(CN12_4, PIN(C, 6), GPIO_INPUT) -GPIO(CN12_5, PIN(B, 9), GPIO_INPUT) -/*GPIO(CN12_10, PIN(D, 8), GPIO_INPUT) UART3 */ -/*GPIO(CN12_11, PIN(A, 5), GPIO_INPUT) USB CC */ -/*GPIO(CN12_12, PIN(A, 12), GPIO_INPUT) USB */ -GPIO(CN12_13, PIN(A, 6), GPIO_INPUT) -/*GPIO(CN12_14, PIN(A, 11), GPIO_INPUT) USB */ -GPIO(CN12_15, PIN(A, 7), GPIO_INPUT) -GPIO(CN12_17, PIN(B, 6), GPIO_INPUT) -GPIO(CN12_18, PIN(B, 11), GPIO_INPUT) -/*GPIO(CN12_19, PIN(C, 7), GPIO_INPUT) Nucleo LED */ -/*GPIO(CN12_21, PIN(A, 9), GPIO_INPUT) Nucleo LED */ -GPIO(CN12_22, PIN(B, 2), GPIO_INPUT) -GPIO(CN12_23, PIN(A, 8), GPIO_INPUT) -GPIO(CN12_24, PIN(B, 1), GPIO_INPUT) -GPIO(CN12_25, PIN(B, 10), GPIO_INPUT) -GPIO(CN12_26, PIN(B, 15), GPIO_INPUT) -GPIO(CN12_27, PIN(B, 4), GPIO_INPUT) -/*GPIO(CN12_28, PIN(B, 14), GPIO_INPUT) I2C2 */ -GPIO(CN12_29, PIN(B, 5), GPIO_INPUT) -/*GPIO(CN12_30, PIN(B, 13), GPIO_INPUT) I2C2 */ -GPIO(CN12_31, PIN(B, 3), GPIO_INPUT) -GPIO(CN12_33, PIN(A, 10), GPIO_INPUT) -/*GPIO(CN12_35, PIN(A, 2), GPIO_INPUT) UART2 */ -GPIO(CN12_36, PIN(F, 5), GPIO_INPUT) -/*GPIO(CN12_37, PIN(A, 3), GPIO_INPUT) UART2 */ -GPIO(CN12_38, PIN(F, 4), GPIO_INPUT) -GPIO(CN12_40, PIN(E, 8), GPIO_INPUT) -GPIO(CN12_41, PIN(D, 13), GPIO_INPUT) -GPIO(CN12_42, PIN(F, 10), GPIO_INPUT) -GPIO(CN12_43, PIN(D, 12), GPIO_INPUT) -GPIO(CN12_44, PIN(E, 7), GPIO_INPUT) -GPIO(CN12_45, PIN(D, 11), GPIO_INPUT) -GPIO(CN12_46, PIN(D, 14), GPIO_INPUT) -/*GPIO(CN12_47, PIN(E, 10), GPIO_INPUT) */ -GPIO(CN12_48, PIN(D, 15), GPIO_INPUT) -/*GPIO(CN12_49, PIN(E, 12), GPIO_INPUT) */ -GPIO(CN12_50, PIN(F, 14), GPIO_INPUT) -/*GPIO(CN12_51, PIN(E, 14), GPIO_INPUT) */ -GPIO(CN12_52, PIN(E, 9), GPIO_INPUT) -/*GPIO(CN12_53, PIN(E, 15), GPIO_INPUT) */ -/*GPIO(CN12_55, PIN(E, 13), GPIO_INPUT) */ -/*GPIO(CN12_56, PIN(E, 11), GPIO_INPUT) */ -GPIO(CN12_57, PIN(F, 13), GPIO_INPUT) -GPIO(CN12_58, PIN(F, 3), GPIO_INPUT) -GPIO(CN12_59, PIN(F, 12), GPIO_INPUT) -GPIO(CN12_60, PIN(F, 15), GPIO_INPUT) -/*GPIO(CN12_61, PIN(G, 14), GPIO_INPUT) I2C1 */ -GPIO(CN12_62, PIN(F, 11), GPIO_INPUT) -GPIO(CN12_64, PIN(E, 0), GPIO_INPUT) -GPIO(CN12_65, PIN(D, 10), GPIO_INPUT) -/*GPIO(CN12_66, PIN(G, 8), GPIO_INPUT) LPUART */ -/*GPIO(CN12_67, PIN(G, 7), GPIO_INPUT) LPUART */ -GPIO(CN12_68, PIN(G, 5), GPIO_INPUT) -GPIO(CN12_69, PIN(G, 4), GPIO_INPUT) -GPIO(CN12_70, PIN(G, 6), GPIO_INPUT) - -GPIO(POR_N, PIN(E, 1), GPIO_INPUT) - -GPIO(QSPI_DEV_CLK, PIN(E, 10), GPIO_OUT_LOW) -GPIO(QSPI_DEV_CS_L, PIN(E, 11), GPIO_OUT_LOW) -GPIO(QSPI_DEV_D0, PIN(E, 12), GPIO_OUT_LOW) -GPIO(QSPI_DEV_D1, PIN(E, 13), GPIO_OUT_LOW) -GPIO(QSPI_DEV_D2, PIN(E, 14), GPIO_OUT_LOW) -GPIO(QSPI_DEV_D3, PIN(E, 15), GPIO_OUT_LOW) + +GPIO(CN7_1, PIN(C, 6), GPIO_INPUT) +/*GPIO(CN7_2, PIN(B, 8), GPIO_INPUT) I2C1 */ +GPIO(CN7_3, PIN(D, 11), GPIO_INPUT) +/*GPIO(CN7_4, PIN(B, 9), GPIO_INPUT) I2C1 */ +GPIO(CN7_5, PIN(B, 13), GPIO_INPUT) +/* CN7_6 is VREFP */ +GPIO(CN7_7, PIN(D, 12), GPIO_INPUT) +/* CN7_8 is GND */ +/*GPIO(CN7_9, PIN(A, 4), GPIO_INPUT) CC1 */ +/*GPIO(CN7_10, PIN(A, 5), GPIO_INPUT) CC2 */ +GPIO(CN7_11, PIN(B, 4), GPIO_INPUT) +GPIO(CN7_12, PIN(A, 6), GPIO_INPUT) +/*GPIO(CN7_13, PIN(B, 5), GPIO_INPUT) Nucleo USB-C */ +GPIO(CN7_14, PIN(A, 7), GPIO_INPUT) +GPIO(CN7_15, PIN(B, 3), GPIO_INPUT) +GPIO(CN7_16, PIN(D, 14), GPIO_INPUT) +/*GPIO(CN7_17, PIN(A, 4), GPIO_INPUT)*/ +GPIO(CN7_18, PIN(D, 15), GPIO_INPUT) +/*GPIO(CN7_19, PIN(B, 4), GPIO_INPUT)*/ +GPIO(CN7_20, PIN(F, 12), GPIO_INPUT) + +/* CN8_1 is NC */ +GPIO(CN8_2, PIN(C, 8), GPIO_INPUT) +/* CN8_3 is IOREF */ +GPIO(CN8_4, PIN(C, 9), GPIO_INPUT) +/* CN8_5 is NRST */ +/*GPIO(CN8_6, PIN(C, 10), GPIO_INPUT) UART4 */ +/* CN8_7 is 3V3 */ +/*GPIO(CN8_8, PIN(C, 11), GPIO_INPUT) UART4 */ +/* CN8_9 is 5V */ +/*GPIO(CN8_10, PIN(C, 12), GPIO_INPUT) UART5 */ +/* CN8_11 is GND */ +/*GPIO(CN8_12, PIN(D, 2), GPIO_INPUT) UART5 */ +/* CN8_13 is GND */ +GPIO(CN8_14, PIN(F, 3), GPIO_INPUT) +/* CN8_15 is VIN */ +GPIO(CN8_16, PIN(F, 5), GPIO_INPUT) + +GPIO(CN9_1, PIN(A, 3), GPIO_INPUT) +GPIO(CN9_2, PIN(D, 7), GPIO_INPUT) +GPIO(CN9_3, PIN(A, 2), GPIO_INPUT) +/*GPIO(CN9_4, PIN(D, 6), GPIO_INPUT) UART2 */ +GPIO(CN9_5, PIN(C, 3), GPIO_INPUT) +/*GPIO(CN9_6, PIN(D, 5), GPIO_INPUT) UART2 */ +GPIO(CN9_7, PIN(B, 0), GPIO_INPUT) +/*GPIO(CN9_8, PIN(D, 4), GPIO_INPUT) SPI2 */ +/*GPIO(CN9_9, PIN(C, 1), GPIO_INPUT) I2C3 */ +/*GPIO(CN9_10, PIN(D, 3), GPIO_INPUT) SPI2 */ +/*GPIO(CN9_11, PIN(C, 0), GPIO_INPUT) I2C3 */ +/* CN9_12 is GND */ +GPIO(CN9_13, PIN(B, 2), GPIO_INPUT) +GPIO(CN9_14, PIN(E, 2), GPIO_INPUT) +GPIO(CN9_15, PIN(B, 6), GPIO_INPUT) +GPIO(CN9_16, PIN(E, 4), GPIO_INPUT) +GPIO(CN9_17, PIN(F, 2), GPIO_INPUT) +GPIO(CN9_18, PIN(E, 5), GPIO_INPUT) +/*GPIO(CN9_19, PIN(F, 1), GPIO_INPUT) I2C2 */ +GPIO(CN9_20, PIN(E, 6), GPIO_INPUT) +/*GPIO(CN9_21, PIN(F, 0), GPIO_INPUT) I2C2 */ +GPIO(CN9_22, PIN(E, 3), GPIO_INPUT) +/* CN9_23 is GND */ +GPIO(CN9_24, PIN(F, 8), GPIO_INPUT) +/*GPIO(CN9_25, PIN(D, 0), GPIO_INPUT) SPI2 */ +GPIO(CN9_26, PIN(F, 7), GPIO_INPUT) +/*GPIO(CN9_27, PIN(D, 1), GPIO_INPUT) SPI2 */ +GPIO(CN9_28, PIN(F, 9), GPIO_INPUT) +GPIO(CN9_29, PIN(G, 0), GPIO_INPUT) +GPIO(CN9_30, PIN(G, 1), GPIO_INPUT) + +/* CN10_1 is AVDD */ +GPIO(CN10_2, PIN(F, 13), GPIO_INPUT) +/* CN10_3 is AGND */ +GPIO(CN10_4, PIN(E, 9), GPIO_INPUT) +/* CN10_5 is GND */ +/*GPIO(CN10_6, PIN(E, 11), GPIO_INPUT) QSPI */ +GPIO(CN10_7, PIN(B, 1), GPIO_INPUT) +GPIO(CN10_8, PIN(F, 14), GPIO_INPUT) +/*GPIO(CN10_9, PIN(C, 2), GPIO_INPUT) Nucleo USB VBUS sense */ +/*GPIO(CN10_10, PIN(E, 13), GPIO_INPUT) QSPI */ +GPIO(CN10_11, PIN(A, 1), GPIO_INPUT) +GPIO(CN10_12, PIN(F, 15), GPIO_INPUT) +/*GPIO(CN10_13, PIN(A, 2), GPIO_INPUT)*/ +/*GPIO(CN10_14, PIN(D, 8), GPIO_INPUT) UART3 */ +GPIO(CN10_15, PIN(B, 10), GPIO_INPUT) +/*GPIO(CN10_16, PIN(D, 9), GPIO_INPUT) UART3 */ +/* CN10_17 is GND */ +GPIO(CN10_18, PIN(E, 8), GPIO_INPUT) +/*GPIO(CN10_19, PIN(E, 15), GPIO_INPUT) QSPI */ +GPIO(CN10_20, PIN(E, 7), GPIO_INPUT) +/*GPIO(CN10_21, PIN(B, 0), GPIO_INPUT)*/ +/* CN10_22 is GND */ +/*GPIO(CN10_23, PIN(E, 12), GPIO_INPUT) QSPI */ +/*GPIO(CN10_24, PIN(E, 10), GPIO_INPUT) QSPI */ +/*GPIO(CN10_25, PIN(E, 14), GPIO_INPUT) QSPI */ +/*GPIO(CN10_26, PIN(E, 12), GPIO_INPUT) QSPI */ +/* CN10_27 is GND */ +/*GPIO(CN10_28, PIN(E, 14), GPIO_INPUT) QSPI */ +GPIO(CN10_29, PIN(A, 0), GPIO_INPUT) +/*GPIO(CN10_30, PIN(E, 15), GPIO_INPUT) QSPI */ +GPIO(CN10_31, PIN(A, 8), GPIO_INPUT) +/*GPIO(CN10_32, PIN(B, 10), GPIO_INPUT)*/ +GPIO(CN10_33, PIN(E, 0), GPIO_INPUT) +GPIO(CN10_34, PIN(B, 11), GPIO_INPUT) + + +/* QSPI controller */ +GPIO(QSPI_DEV_CLK, PIN(E, 10), GPIO_INPUT) +GPIO(QSPI_DEV_CS_L, PIN(E, 11), GPIO_INPUT) +GPIO(QSPI_DEV_D0, PIN(E, 12), GPIO_INPUT) +GPIO(QSPI_DEV_D1, PIN(E, 13), GPIO_INPUT) +GPIO(QSPI_DEV_D2, PIN(E, 14), GPIO_INPUT) +GPIO(QSPI_DEV_D3, PIN(E, 15), GPIO_INPUT) /* I2C pins should be configured as inputs until I2C module is */ /* initialized. This will avoid driving the lines unintentionally.*/ -GPIO(TPM_I2C1_HOST_SCL, PIN(G, 14), GPIO_OUTPUT | GPIO_OPEN_DRAIN) -GPIO(TPM_I2C1_HOST_SDA, PIN(G, 13), GPIO_OUTPUT | GPIO_OPEN_DRAIN) -GPIO(INA_I2C2_DEV_SCL, PIN(B, 13), GPIO_ALTERNATE) -GPIO(INA_I2C2_DEV_SDA, PIN(B, 14), GPIO_ALTERNATE) +GPIO(TPM_I2C1_HOST_SCL, PIN(B, 8), GPIO_OUTPUT | GPIO_OPEN_DRAIN) +GPIO(TPM_I2C1_HOST_SDA, PIN(B, 9), GPIO_OUTPUT | GPIO_OPEN_DRAIN) +GPIO(INA_I2C2_DEV_SCL, PIN(F, 1), GPIO_OUTPUT | GPIO_OPEN_DRAIN) +GPIO(INA_I2C2_DEV_SDA, PIN(F, 0), GPIO_OUTPUT | GPIO_OPEN_DRAIN) +GPIO(AUX_I2C3_DEV_SCL, PIN(C, 0), GPIO_OUTPUT | GPIO_OPEN_DRAIN) +GPIO(AUX_I2C3_DEV_SDA, PIN(C, 1), GPIO_OUTPUT | GPIO_OPEN_DRAIN) /* These pins are used for USART and are set to alternate mode below */ -GPIO(USART1_AP_TX, PIN(G, 9), GPIO_INPUT) -GPIO(USART1_AP_RX, PIN(G, 10), GPIO_INPUT) -GPIO(USART2_OT_TX, PIN(A, 2), GPIO_INPUT) -GPIO(USART2_OT_RX, PIN(A, 3), GPIO_INPUT) -GPIO(USART3_FP_MCU_TX, PIN(D, 8), GPIO_INPUT) -GPIO(USART3_FP_MCU_RX, PIN(D, 9), GPIO_INPUT) -GPIO(USART4_EC_TX, PIN(A, 0), GPIO_INPUT) -GPIO(USART4_EC_RX, PIN(A, 1), GPIO_INPUT) +GPIO(USART2_OT_TX, PIN(D, 5), GPIO_INPUT) +GPIO(USART2_OT_RX, PIN(D, 6), GPIO_INPUT) +GPIO(USART4_AP_TX, PIN(C, 10), GPIO_INPUT) +GPIO(USART4_AP_RX, PIN(C, 11), GPIO_INPUT) +GPIO(USART5_FPMCU_TX, PIN(C, 12), GPIO_INPUT) +GPIO(USART5_FPMCU_RX, PIN(D, 2), GPIO_INPUT) +GPIO(USART3_EC_TX, PIN(D, 8), GPIO_INPUT) +GPIO(USART3_EC_RX, PIN(D, 9), GPIO_INPUT) GPIO(LPUART1_HYPER_RX, PIN(G, 7), GPIO_INPUT) GPIO(LPUART1_HYPER_TX, PIN(G, 8), GPIO_INPUT) +/* Additional SPI controller, only available on CN11/CN12 */ GPIO(SPI2_CS, PIN(D, 0), GPIO_OUT_HIGH) GPIO(SPI2_SCK, PIN(D, 1), GPIO_ALTERNATE) -GPIO(SPI2_CIDO, PIN(C, 2), GPIO_ALTERNATE) -GPIO(SPI2_CODI, PIN(C, 3), GPIO_ALTERNATE) - +GPIO(SPI2_CIDO, PIN(D, 3), GPIO_ALTERNATE) +GPIO(SPI2_CODI, PIN(D, 4), GPIO_ALTERNATE) /* USB pins */ GPIO(USB_FS_DM, PIN(A, 11), GPIO_ALTERNATE) GPIO(USB_FS_DP, PIN(A, 12), GPIO_ALTERNATE) -GPIO(CC1, PIN(A, 4), GPIO_ANALOG) -GPIO(CC2, PIN(A, 5), GPIO_ANALOG) +GPIO(CC1, PIN(A, 4), GPIO_ANALOG) +GPIO(CC2, PIN(A, 5), GPIO_ANALOG) /* Signals for hardware on the Nucleo board itself */ -GPIO(NUCLEO_LED1, PIN(C, 7), GPIO_OUT_HIGH) /* Green */ -GPIO(NUCLEO_LED2, PIN(B, 7), GPIO_OUT_LOW) /* Blue */ -GPIO(NUCLEO_LED3, PIN(A, 9), GPIO_OUT_LOW) /* Red */ +GPIO(NUCLEO_LED1, PIN(C, 7), GPIO_OUT_HIGH) /* Green */ +GPIO(NUCLEO_LED2, PIN(B, 7), GPIO_OUT_LOW) /* Blue */ +GPIO(NUCLEO_LED3, PIN(A, 9), GPIO_OUT_LOW) /* Red */ /* Unimplemented signals since we are not an EC */ UNIMPLEMENTED(ENTERING_RW) @@ -176,16 +171,16 @@ UNIMPLEMENTED(WP_L) ALTERNATE(PIN_MASK(A, 0x1800), 10, MODULE_USB, 0) /* USB: PA11/12 */ -ALTERNATE(PIN_MASK(G, 0x0600), 7, MODULE_UART, 0) /* USART1: PG09/PG10 - AP UART */ -ALTERNATE(PIN_MASK(A, 0x000C), 7, MODULE_UART, 0) /* USART2: PA02/PA03 - OT UART */ -ALTERNATE(PIN_MASK(D, 0x0300), 7, MODULE_UART, 0) /* USART3: PD08/PD09 - HyperDebug console */ -ALTERNATE(PIN_MASK(A, 0x0003), 8, MODULE_UART, 0) /* USART4: PA00/PA01 - EC UART */ -ALTERNATE(PIN_MASK(G, 0x0180), 8, MODULE_UART, 0) /* LPUART1: PG07/PG08 - FP MCU UART */ +ALTERNATE(PIN_MASK(D, 0x0060), 7, MODULE_UART, 0) /* USART2: PD5/PD6 - OT UART */ +ALTERNATE(PIN_MASK(C, 0x0C00), 8, MODULE_UART, 0) /* USART4: PC10/PC11 - AP UART */ +ALTERNATE(PIN_MASK(D, 0x0300), 7, MODULE_UART, 0) /* USART3: PD8/PD9 - EC UART */ +ALTERNATE(PIN_MASK(C, 0x1000), 8, MODULE_UART, 0) /* USART5: PC12 - FP MCU UART */ +ALTERNATE(PIN_MASK(D, 0x0004), 8, MODULE_UART, 0) /* USART5: PD2 - FP MCU UART */ +ALTERNATE(PIN_MASK(G, 0x0180), 8, MODULE_UART, 0) /* LPUART1: PG7/PG8 - HyperDebug console */ -ALTERNATE(PIN_MASK(B, 0x6000), 4, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C2: PB13/14 */ -ALTERNATE(PIN_MASK(G, 0x6000), 4, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C1: PG13/14 */ -ALTERNATE(PIN_MASK(C, 0x0003), 4, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C3: PC00/01 */ +ALTERNATE(PIN_MASK(F, 0x0003), 4, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C2: PF0/PF1 */ +ALTERNATE(PIN_MASK(B, 0x0300), 4, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C1: PB8/PB9 */ +ALTERNATE(PIN_MASK(C, 0x0003), 4, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C3: PC0/PC1 */ /*ALTERNATE(PIN_MASK(E, 0xFC00), 10, MODULE_SPI_FLASH, 0) / * QSPI: PE10-15 */ -/*ALTERNATE(PIN_MASK(D, 0x0001), 5, MODULE_SPI, 0) / * SPI2: PD00 CS */ -ALTERNATE(PIN_MASK(D, 0x0002), 5, MODULE_SPI, 0) /* SPI2: PD01 SCK */ -ALTERNATE(PIN_MASK(C, 0x000C), 5, MODULE_SPI, 0) /* SPI2: PC02/03 CIDO/DOCI */ +/*ALTERNATE(PIN_MASK(D, 0x0001), 5, MODULE_SPI, 0) / * SPI2: PD0 CS */ +ALTERNATE(PIN_MASK(D, 0x001A), 5, MODULE_SPI, 0) /* SPI2: PD1/PD3/PD4 SCK/CIDO/DOCI */ |