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authorDiana Z <dzigterman@chromium.org>2022-07-27 09:09:21 -0600
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-08-03 00:20:32 +0000
commit83f85e3648f515896626a5e21595109dd5d824b7 (patch)
treeab61dfeba88822a7c6017c6b585f3cde7429f91d
parent1192d2ac276b062bc06e45af48870a7f87e2b692 (diff)
downloadchrome-ec-83f85e3648f515896626a5e21595109dd5d824b7.tar.gz
TCPMv2: Add BIST shared mode
Systems which have a shared power reserve over ports are required to implement BIST shared test mode. This mode will force us to advertise more current than we can actually support, but it is only for test purposes and the tester should not actually draw past our VIF declared maximum. BRANCH=None BUG=b:237256250 TEST=zmake testall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iacb17e0b3eb14c5b38220c7008aa3d2a8f0607a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3789835 Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
-rw-r--r--common/mock/usb_pd_dpm_mock.c8
-rw-r--r--common/usbc/usb_pd_dpm.c81
-rw-r--r--common/usbc/usb_pe_drp_sm.c12
-rw-r--r--include/usb_pd.h6
-rw-r--r--include/usb_pd_dpm.h14
-rw-r--r--test/fake_usbc.c8
6 files changed, 126 insertions, 3 deletions
diff --git a/common/mock/usb_pd_dpm_mock.c b/common/mock/usb_pd_dpm_mock.c
index 4c0495f7b2..7531ee49d6 100644
--- a/common/mock/usb_pd_dpm_mock.c
+++ b/common/mock/usb_pd_dpm_mock.c
@@ -73,6 +73,14 @@ void dpm_remove_source(int port)
{
}
+void dpm_bist_shared_mode_enter(int port)
+{
+}
+
+void dpm_bist_shared_mode_exit(int port)
+{
+}
+
int dpm_get_source_pdo(const uint32_t **src_pdo, const int port)
{
*src_pdo = pd_src_pdo;
diff --git a/common/usbc/usb_pd_dpm.c b/common/usbc/usb_pd_dpm.c
index 6e68c764f4..4034140492 100644
--- a/common/usbc/usb_pd_dpm.c
+++ b/common/usbc/usb_pd_dpm.c
@@ -616,6 +616,9 @@ static atomic_t source_frs_max_requested;
/* Ports with non-PD sinks, so current requirements are unknown */
static atomic_t non_pd_sink_max_requested;
+/* BIST shared test mode */
+static bool bist_shared_mode_enabled;
+
#define LOWEST_PORT(p) __builtin_ctz(p) /* Undefined behavior if p == 0 */
static int count_port_bits(uint32_t bitmask)
@@ -651,6 +654,13 @@ static void balance_source_ports(void)
if (deferred_waiting)
return;
+ /*
+ * Turn off all shared power logic while BIST shared test mode is active
+ * on the system.
+ */
+ if (bist_shared_mode_enabled)
+ return;
+
mutex_lock(&max_current_claimed_lock);
/* Remove any ports which no longer require 3.0 A */
@@ -873,16 +883,83 @@ void dpm_remove_source(int port)
balance_source_ports();
}
+void dpm_bist_shared_mode_enter(int port)
+{
+ /*
+ * From 6.4.3.3.1 BIST Shared Test Mode Entry:
+ *
+ * "When any Master Port in a shared capacity group receives a BIST
+ * Message with a BIST Shared Test Mode Entry BIST Data Object, while
+ * in the PE_SRC_Ready State, the UUT Shall enter a compliance test
+ * mode where the maximum source capability is always offered on every
+ * port, regardless of the availability of shared power i.e. all shared
+ * power management is disabled.
+ * . . .
+ * On entering this mode, the UUT Shall send a new Source_Capabilities
+ * Message from each Port in the shared capacity group within
+ * tBISTSharedTestMode. The Tester will not exceed the shared capacity
+ * during this mode."
+ */
+
+ /* Shared mode is unnecessary without at least one 3.0 A port */
+ if (CONFIG_USB_PD_3A_PORTS == 0)
+ return;
+
+ /* Enter mode only if this port had been in PE_SRC_Ready */
+ if (pd_get_power_role(port) != PD_ROLE_SOURCE)
+ return;
+
+ bist_shared_mode_enabled = true;
+
+ /* Trigger new source caps on all source ports */
+ for (int i = 0; i < board_get_usb_pd_port_count(); i++) {
+ if (pd_get_power_role(i) == PD_ROLE_SOURCE)
+ typec_select_src_current_limit_rp(i, TYPEC_RP_3A0);
+ }
+}
+
+void dpm_bist_shared_mode_exit(int port)
+{
+ /*
+ * From 6.4.3.3.2 BIST Shared Test Mode Exit:
+ *
+ * "Upon receipt of a BIST Message, with a BIST Shared Test Mode Exit
+ * BIST Data Object, the UUT Shall return a GoodCRC Message and Shall
+ * exit the BIST Shared Capacity Test Mode.
+ * . . .
+ * On exiting the mode, the UUT May send a new Source_Capabilities
+ * Message to each port in the shared capacity group or the UUT May
+ * perform ErrorRecovery on each port."
+ */
+
+ /* Shared mode is unnecessary without at least one 3.0 A port */
+ if (CONFIG_USB_PD_3A_PORTS == 0)
+ return;
+
+ /* Do nothing if Exit was received with no Entry */
+ if (!bist_shared_mode_enabled)
+ return;
+
+ bist_shared_mode_enabled = false;
+
+ /* Declare error recovery bankruptcy */
+ for (int i = 0; i < board_get_usb_pd_port_count(); i++) {
+ pd_set_error_recovery(i);
+ }
+}
+
/*
* Note: all ports receive the 1.5 A source offering until they are found to
* match a criteria on the 3.0 A priority list (ex. through sink capability
* probing), at which point they will be offered a new 3.0 A source capability.
+ *
+ * All ports must be offered our full capability while in BIST shared test mode.
*/
__overridable int dpm_get_source_pdo(const uint32_t **src_pdo, const int port)
{
/* Max PDO may not exist on boards which don't offer 3 A */
#if CONFIG_USB_PD_3A_PORTS > 0
- if (max_current_claimed & BIT(port)) {
+ if (max_current_claimed & BIT(port) || bist_shared_mode_enabled) {
*src_pdo = pd_src_pdo_max;
return pd_src_pdo_max_cnt;
}
@@ -897,7 +974,7 @@ int dpm_get_source_current(const int port)
if (pd_get_power_role(port) == PD_ROLE_SINK)
return 0;
- if (max_current_claimed & BIT(port))
+ if (max_current_claimed & BIT(port) || bist_shared_mode_enabled)
return 3000;
else if (typec_get_default_current_limit_rp(port) == TYPEC_RP_1A5)
return 1500;
diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c
index e6a988e62f..7d9318b3e3 100644
--- a/common/usbc/usb_pe_drp_sm.c
+++ b/common/usbc/usb_pe_drp_sm.c
@@ -5287,6 +5287,18 @@ static void pe_bist_tx_entry(int port)
*/
if (tcpc_set_bist_test_mode(port, true) != EC_SUCCESS)
CPRINTS("C%d: Failed to enter BIST Test Mode", port);
+ } else if (IS_ENABLED(CONFIG_USB_PD_REV30) &&
+ mode == BIST_SHARED_MODE_ENTER) {
+ /* Notify the DPM and return to ready */
+ dpm_bist_shared_mode_enter(port);
+ pe_set_ready_state(port);
+ return;
+ } else if (IS_ENABLED(CONFIG_USB_PD_REV30) &&
+ mode == BIST_SHARED_MODE_EXIT) {
+ /* Notify the DPM and return to ready */
+ dpm_bist_shared_mode_exit(port);
+ pe_set_ready_state(port);
+ return;
} else {
/* Ignore unsupported BIST messages. */
pe_set_ready_state(port);
diff --git a/include/usb_pd.h b/include/usb_pd.h
index 2d7da1aa9f..9a5c136d55 100644
--- a/include/usb_pd.h
+++ b/include/usb_pd.h
@@ -148,7 +148,7 @@ enum pd_rx_errors {
/* BDO : BIST Data Object
* 31:28 BIST Mode
* In PD 3.0, all but Carrier Mode 2 (as Carrier Mode) and Test Data are
- * reserved.
+ * reserved, with a new BIST shared mode added
* 27:16 Reserved
* 15:0 Returned error counters (reserved in PD 3.0)
*/
@@ -161,6 +161,8 @@ enum pd_rx_errors {
#define BDO_MODE_CARRIER3 (BIST_CARRIER_MODE_3 << 28)
#define BDO_MODE_EYE (BIST_EYE_PATTERN << 28)
#define BDO_MODE_TEST_DATA (BIST_TEST_DATA << 28)
+#define BDO_MODE_SHARED_ENTER (BIST_SHARED_MODE_ENTER << 28)
+#define BDO_MODE_SHARED_EXIT (BIST_SHARED_MODE_EXIT << 28)
#define BDO(mode, cnt) ((mode) | ((cnt)&0xFFFF))
@@ -175,6 +177,8 @@ enum pd_rx_errors {
#define BIST_CARRIER_MODE_3 6
#define BIST_EYE_PATTERN 7
#define BIST_TEST_DATA 8
+#define BIST_SHARED_MODE_ENTER 9
+#define BIST_SHARED_MODE_EXIT 10
#define SVID_DISCOVERY_MAX 16
diff --git a/include/usb_pd_dpm.h b/include/usb_pd_dpm.h
index 47c8db3cb7..05459086fc 100644
--- a/include/usb_pd_dpm.h
+++ b/include/usb_pd_dpm.h
@@ -131,6 +131,20 @@ int dpm_get_source_pdo(const uint32_t **src_pdo, const int port);
int dpm_get_source_current(const int port);
/*
+ * Report we've been asked to enter BIST Shared Test Mode
+ *
+ * @param port USB-C port number
+ */
+void dpm_bist_shared_mode_enter(int port);
+
+/*
+ * Report we've been asked to exit BIST Shared Test Mode
+ *
+ * @param port USB-C port number
+ */
+void dpm_bist_shared_mode_exit(int port);
+
+/*
* Build SOP Status Data Block (SDB)
*
* @param port USB-C port number
diff --git a/test/fake_usbc.c b/test/fake_usbc.c
index 510370ed2e..e30afadd46 100644
--- a/test/fake_usbc.c
+++ b/test/fake_usbc.c
@@ -328,6 +328,14 @@ void dpm_remove_source(int port)
{
}
+void dpm_bist_shared_mode_enter(int port)
+{
+}
+
+void dpm_bist_shared_mode_exit(int port)
+{
+}
+
int dpm_get_source_pdo(const uint32_t **src_pdo, const int port)
{
*src_pdo = pd_src_pdo;