diff options
| author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2022-07-18 13:15:27 +0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-18 07:26:29 +0000 |
| commit | b5f0e68ae441132d8aa1811513a07a27d5ae5709 (patch) | |
| tree | 4a21e00dec9379a6080c58045922a38ba42d0e64 | |
| parent | f22c1a18ec5bc683d8ee0eca6bd0964860955450 (diff) | |
| download | chrome-ec-b5f0e68ae441132d8aa1811513a07a27d5ae5709.tar.gz | |
Joxer: enable 1.8v input for 1.8v I/O
Follow CL:3765107 to enable 1.8v input for 1.8v I/O on joxer
BRANCH=none
BUG=b:236668079, b:237717730
TEST=zmake build joxer
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: I9fe95b3c76e5255d4eece570106f1b73ab1bed39
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3768129
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Andrew McRae <amcrae@google.com>
| -rw-r--r-- | zephyr/projects/nissa/joxer_overlay.dts | 27 | ||||
| -rw-r--r-- | zephyr/projects/nissa/joxer_power_signals.dts | 2 |
2 files changed, 28 insertions, 1 deletions
diff --git a/zephyr/projects/nissa/joxer_overlay.dts b/zephyr/projects/nissa/joxer_overlay.dts index 93fa888404..1c6e1a3185 100644 --- a/zephyr/projects/nissa/joxer_overlay.dts +++ b/zephyr/projects/nissa/joxer_overlay.dts @@ -271,6 +271,23 @@ }; }; +&gpio_acc_int_l { + gpios = <&gpioc 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_imu_int_l { + gpios = <&gpioj 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_vccin_aux_vid0 { + gpios = <&gpiod 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_vccin_aux_vid1 { + gpios = <&gpiok 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; + +&gpio_ec_prochot_odl { + gpios = <&gpioi 1 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; +}; + &thermistor_3V3_51K1_47K_4050B { status = "okay"; }; @@ -296,6 +313,16 @@ pinctrl-names = "default"; }; +&pinctrl { + i2c2_clk_gpf6_default: i2c2_clk_gpf6_default { + gpio-voltage = "1v8"; + }; + i2c2_data_gpf7_default: i2c2_data_gpf7_default { + gpio-voltage = "1v8"; + }; +}; + + &i2c0 { label = "I2C_EEPROM"; clock-frequency = <I2C_BITRATE_FAST>; diff --git a/zephyr/projects/nissa/joxer_power_signals.dts b/zephyr/projects/nissa/joxer_power_signals.dts index 0a3ead778b..0f10bba52f 100644 --- a/zephyr/projects/nissa/joxer_power_signals.dts +++ b/zephyr/projects/nissa/joxer_power_signals.dts @@ -75,7 +75,7 @@ compatible = "intel,ap-pwrseq-gpio"; dbg-label = "VCCST_PWRGD output to PCH"; enum-name = "PWR_VCCST_PWRGD"; - gpios = <&gpioe 5 GPIO_OPEN_DRAIN>; + gpios = <&gpioe 5 (GPIO_OPEN_DRAIN | GPIO_VOLTAGE_1P8)>; output; }; pwr-imvp9-vrrdy-od { |