Fix various misspellings in comments

No functional changes.

BUG=none
BRANCH=none
TEST=make buildall passes

Change-Id: Ie852feb8e3951975d99dce5a49c17f5f0e8bc791
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403417
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>

47 files changed, 67 insertions, 67 deletions

diff --git a/board/ryu/board.h b/board/ryu/board.h
index 1e8be353dc..1658a98c1e 100644
--- a/board/ryu/board.h
+++ b/board/ryu/board.h
@@ -220,7 +220,7 @@ enum power_signal {
 	POWER_SIGNAL_COUNT
 };
 
-/* Sensor index defintion */
+/* Sensor index definition */
 enum sensor_id {
 	RYU_LID_ACCEL,
 	RYU_LID_GYRO,
diff --git a/chip/g/sps.c b/chip/g/sps.c
index 82336eb5a7..21558a6822 100644
--- a/chip/g/sps.c
+++ b/chip/g/sps.c
@@ -44,7 +44,7 @@
 
 /*
  * Hardware pointers use one extra bit, which means that indexing FIFO and
- * values written into the pointers have to have dfferent sizes. Tracked under
+ * values written into the pointers have to have different sizes. Tracked under
  * http://b/20894690
  */
 #define SPS_FIFO_PTR_MASK	((SPS_FIFO_MASK << 1) | 1)
@@ -118,7 +118,7 @@ int sps_transmit(uint8_t *data, size_t data_size)
 				/*
 				 * CR50 SPS controller does not allow byte
 				 * accesses for writes into the FIFO, so read
-				 * modify/write is requred. Tracked uder
+				 * modify/write is required. Tracked under
 				 * http://b/20894727
 				 */
 				bit_shift = 8 * (wptr & 3);
@@ -151,7 +151,7 @@ int sps_transmit(uint8_t *data, size_t data_size)
 
 	/*
 	 * Start TX if necessary. This happens after FIFO is primed, which
-	 * helps aleviate TX underrun problems but introduces delay before
+	 * helps alleviate TX underrun problems but introduces delay before
 	 * data starts coming out.
 	 */
 	if (!GREAD_FIELD(SPS, FIFO_CTRL, TXFIFO_EN))
@@ -290,7 +290,7 @@ static void sps_advance_rx(int port, int data_size)
 /*
  * Actual receive interrupt processing function. Invokes the callback passing
  * it a pointer to the linear space in the RX FIFO and the number of bytes
- * availabe at that address.
+ * available at that address.
  *
  * If RX fifo is wrapping around, the callback will be called twice with two
  * flat pointers.
@@ -363,7 +363,7 @@ DECLARE_IRQ(GC_IRQNUM_SPS0_RXFIFO_LVL_INTR, _sps0_interrupt, 1);
  */
 
  /*
-  * Receive callback implemets a simple state machine, it could be in one of
+  * Receive callback implements a simple state machine, it could be in one of
   * three states:  not started, receiving frame, frame finished.
   */
 
@@ -483,7 +483,7 @@ static int command_sps(int argc, char **argv)
 
 		/*
 		 * Wait for receive state machine to transition out of 'frame
-		 * finised' state.
+		 * finished' state.
 		 */
 		while (rx_state == spstrx_finished) {
 			watchdog_reload();
diff --git a/chip/g/sps_tpm.c b/chip/g/sps_tpm.c
index 771ae847b1..8658ffc041 100644
--- a/chip/g/sps_tpm.c
+++ b/chip/g/sps_tpm.c
@@ -131,7 +131,7 @@ static void init_new_cycle(void)
 	enable_sleep(SLEEP_MASK_SPI);
 }
 
-/* Extract R/W bit, register addresss, and data count from 4-byte header */
+/* Extract R/W bit, register address, and data count from 4-byte header */
 static int header_says_to_read(uint8_t *data, uint32_t *reg, uint32_t *count)
 {
 	uint32_t addr = data[1];		/* reg address is MSB first */
diff --git a/chip/g/usb.c b/chip/g/usb.c
index 43f10f0968..0fc4f62242 100644
--- a/chip/g/usb.c
+++ b/chip/g/usb.c
@@ -907,7 +907,7 @@ static void ep0_interrupt(uint32_t intr_on_out, uint32_t intr_on_in)
 			/*
 			 * The Programmer's Guide says (p291) to stall any
 			 * further INs, but that's stupid because it'll destroy
-			 * the packet we just tranferred to SPRAM, so don't do
+			 * the packet we just transferred to SPRAM, so don't do
 			 * that (we tried it anyway, and Bad Things happened).
 			 * Also don't stop here, but keep looking at stuff.
 			 */
diff --git a/chip/lm4/gpio.c b/chip/lm4/gpio.c
index 97e886294b..1b1e0a80c6 100644
--- a/chip/lm4/gpio.c
+++ b/chip/lm4/gpio.c
@@ -83,7 +83,7 @@ test_mockable int gpio_get_level(enum gpio_signal signal)
 void gpio_set_level(enum gpio_signal signal, int value)
 {
 	/*
-	 * Ok to write 0xff becuase LM4_GPIO_DATA bit-masks only the bit
+	 * Ok to write 0xff because LM4_GPIO_DATA bit-masks only the bit
 	 * we care about.
 	 */
 	LM4_GPIO_DATA(gpio_list[signal].port,
diff --git a/chip/mec1322/clock.c b/chip/mec1322/clock.c
index 0fcb411d23..1cb0bc4aaf 100644
--- a/chip/mec1322/clock.c
+++ b/chip/mec1322/clock.c
@@ -105,7 +105,7 @@ static void htimer_init(void)
 {
 	MEC1322_INT_BLK_EN |= 1 << 17;
 	MEC1322_INT_ENABLE(17) |= 1 << 20;  /* GIRQ=17, aggregator bit = 20 */
-	MEC1322_HTIMER_PRELOAD = 0;  /* disable at begining */
+	MEC1322_HTIMER_PRELOAD = 0;  /* disable at beginning */
 
 	task_enable_irq(MEC1322_IRQ_HTIMER);
 }
diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c
index 298a161762..3ce2717222 100644
--- a/chip/mec1322/lpc.c
+++ b/chip/mec1322/lpc.c
@@ -244,7 +244,7 @@ static void setup_lpc(void)
 	/* Set up 8042 interface at 0x60/0x64 */
 	MEC1322_LPC_8042_BAR = 0x00608104;
 
-	/* Set up indication of Auxillary sts */
+	/* Set up indication of Auxiliary sts */
 	MEC1322_8042_KB_CTRL |= 1 << 7;
 
 	MEC1322_8042_ACT |= 1;
@@ -630,7 +630,7 @@ static void lpc_clear_host_events(void)
  * the chipset_suspend is called.
  *
  * The chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON)
- * is used to detect the S0ix transiton.
+ * is used to detect the S0ix transition.
  *
  * During S0ix entry, the wake mask for lid open is enabled.
  *
diff --git a/chip/npcx/hwtimer.c b/chip/npcx/hwtimer.c
index 366f1624f4..ac5a301019 100644
--- a/chip/npcx/hwtimer.c
+++ b/chip/npcx/hwtimer.c
@@ -139,7 +139,7 @@ uint32_t __hw_clock_get_sleep_time(uint16_t pre_evt_cnt)
 	uint32_t sleep_time;
 	uint16_t cnt = __hw_clock_event_count();
 
-	/* Event has been triggered but timer ISR dosen't handle it */
+	/* Event has been triggered but timer ISR doesn't handle it */
 	if (IS_BIT_SET(NPCX_ITCTS(ITIM_EVENT_NO), NPCX_ITCTS_TO_STS))
 		sleep_time = FP_TO_INT((fp_inter_t)(pre_evt_cnt+1) * evt_tick);
 	/* Event hasn't been triggered */
diff --git a/chip/npcx/i2c.c b/chip/npcx/i2c.c
index 993b3565e4..d697c46045 100644
--- a/chip/npcx/i2c.c
+++ b/chip/npcx/i2c.c
@@ -38,7 +38,7 @@
  */
 #define I2C_MIN_TIMEOUT 25
 
-/* Marco functions of I2C */
+/* Macro functions of I2C */
 #define I2C_START(ctrl) SET_BIT(NPCX_SMBCTL1(ctrl), NPCX_SMBCTL1_START)
 #define I2C_STOP(ctrl)  SET_BIT(NPCX_SMBCTL1(ctrl), NPCX_SMBCTL1_STOP)
 #define I2C_NACK(ctrl)  SET_BIT(NPCX_SMBCTL1(ctrl), NPCX_SMBCTL1_ACK)
@@ -66,7 +66,7 @@ enum smb_error {
 
 /*
  * Internal SMBus Interface driver states values, which reflect events
- * which occured on the bus
+ * which occurred on the bus
  */
 enum smb_oper_state_t {
 	SMB_IDLE,
diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c
index d893218640..8885013195 100644
--- a/chip/npcx/lpc.c
+++ b/chip/npcx/lpc.c
@@ -878,7 +878,7 @@ void lpc_lreset_pltrst_handler(void)
 		pltrst_asserted ? "" : "de");
 
 	/*
-	 * Once LRESET is de-asserted (low -> high), we need to intialize lpc
+	 * Once LRESET is de-asserted (low -> high), we need to initialize lpc
 	 * settings once. If RSTCTL_LRESET_PLTRST_MODE is active, LPC registers
 	 * won't be reset by Host domain reset but Core domain does.
 	 */
diff --git a/chip/stm32/adc-stm32f0.c b/chip/stm32/adc-stm32f0.c
index fc6c11f334..cffae10fd9 100644
--- a/chip/stm32/adc-stm32f0.c
+++ b/chip/stm32/adc-stm32f0.c
@@ -169,7 +169,7 @@ static int adc_enable_watchdog_no_lock(void)
 			  (watchdog_ain_id << 26);
 	adc_configure(watchdog_ain_id);
 
-	/* Clear AWD interupt flag */
+	/* Clear AWD interrupt flag */
 	STM32_ADC_ISR = 0x80;
 	/* Set Watchdog enable bit on a single channel */
 	STM32_ADC_CFGR1 |= STM32_ADC_CFGR1_AWDEN | STM32_ADC_CFGR1_AWDSGL;
diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c
index a957686687..de92454369 100644
--- a/chip/stm32/uart.c
+++ b/chip/stm32/uart.c
@@ -165,7 +165,7 @@ void uart_interrupt(void)
 {
 #ifndef CONFIG_UART_TX_DMA
 	/*
-	 * When trasmission completes, enable sleep if we are done with Tx.
+	 * When transmission completes, enable sleep if we are done with Tx.
 	 * After that, proceed if there is other interrupt to handle.
 	 */
 	if (STM32_USART_SR(UARTN_BASE) & STM32_USART_SR_TC) {
diff --git a/chip/stm32/usart-stm32f0.c b/chip/stm32/usart-stm32f0.c
index 4b24e49642..8ae2085498 100644
--- a/chip/stm32/usart-stm32f0.c
+++ b/chip/stm32/usart-stm32f0.c
@@ -46,7 +46,7 @@ static void usart_variant_disable(struct usart_config const *config)
 	int index = config->hw->index;
 
 	/*
-	 * Only disable the shared interupt for USART3/4 if both USARTs are
+	 * Only disable the shared interrupt for USART3/4 if both USARTs are
 	 * now disabled.
 	 */
 	if ((index == 0) ||
diff --git a/chip/stm32/usart_rx_dma.h b/chip/stm32/usart_rx_dma.h
index 8056c2635e..a5a04e2829 100644
--- a/chip/stm32/usart_rx_dma.h
+++ b/chip/stm32/usart_rx_dma.h
@@ -38,7 +38,7 @@
  * to use for the DMA circular buffer.  This buffer must be large enough to
  * hide the worst case interrupt latency the system will encounter.  The DMA
  * RX driver adds to the output of the usart_info command a high water mark
- * of how many bytes were transfered out of this FIFO on any one interrupt.
+ * of how many bytes were transferred out of this FIFO on any one interrupt.
  * This value can be used to correctly size the FIFO by setting the FIFO_SIZE
  * to something large, stress test the USART, and run usart_info.  After a
  * reasonable stress test the "DMA RX max_bytes" value will be a reasonable
@@ -73,7 +73,7 @@ struct usart_rx_dma_state {
 	size_t index;
 
 	/*
-	 * Maximum number of bytes transfered in any one RX interrupt.
+	 * Maximum number of bytes transferred in any one RX interrupt.
 	 */
 	uint32_t max_bytes;
 };
@@ -94,7 +94,7 @@ struct usart_rx_dma {
 };
 
 /*
- * Function pointers needed to intialize a usart_rx struct.  These shouldn't
+ * Function pointers needed to initialize a usart_rx struct.  These shouldn't
  * be called in any other context as they assume that the producer or config
  * that they are passed was initialized with a complete usart_rx_dma struct.
  */
diff --git a/chip/stm32/usart_tx_dma.h b/chip/stm32/usart_tx_dma.h
index 1dd3d7da41..33a97395ad 100644
--- a/chip/stm32/usart_tx_dma.h
+++ b/chip/stm32/usart_tx_dma.h
@@ -79,7 +79,7 @@ struct usart_tx_dma {
 };
 
 /*
- * Function pointers needed to intialize a usart_tx struct.  These shouldn't
+ * Function pointers needed to initialize a usart_tx struct.  These shouldn't
  * be called in any other context as they assume that the consumer or config
  * that they are passed was initialized with a complete usart_tx_dma struct.
  */
diff --git a/chip/stm32/usb.c b/chip/stm32/usb.c
index a3de00f53a..dbbc800ffe 100644
--- a/chip/stm32/usb.c
+++ b/chip/stm32/usb.c
@@ -326,7 +326,7 @@ void usb_init(void)
 
 	/* Enable interrupt handlers */
 	task_enable_irq(STM32_IRQ_USB_LP);
-	/* set interrupts mask : reset/correct tranfer/errors */
+	/* set interrupts mask : reset/correct transfer/errors */
 	STM32_USB_CNTR = 0xe400;
 
 #ifdef CONFIG_USB_SERIALNO
diff --git a/common/charge_manager.c b/common/charge_manager.c
index fa3a16c321..a4d9d8dea4 100644
--- a/common/charge_manager.c
+++ b/common/charge_manager.c
@@ -823,7 +823,7 @@ void charge_manager_set_ceil(int port, enum ceil_requestor requestor, int ceil)
  *
  * @param port			Charge port to select as override, or
  *				OVERRIDE_OFF to select no override port,
- *				or OVERRIDE_DONT_CHARGE to specifc that no
+ *				or OVERRIDE_DONT_CHARGE to specific that no
  *				charge port should be selected.
  */
 int charge_manager_set_override(int port)
diff --git a/common/fmap.c b/common/fmap.c
index c76b6621d3..6f84c37b63 100644
--- a/common/fmap.c
+++ b/common/fmap.c
@@ -152,7 +152,7 @@ const struct _ec_fmap {
 			 * ASCII, and padded with \0.
 			 * TODO: Get the relative offset of
 			 * __version_struct_offset within our RW image to
-			 * accomodate image asymmetry.
+			 * accommodate image asymmetry.
 			 */
 			.area_name = "RW_FWID",
 			.area_offset = CONFIG_EC_WRITABLE_STORAGE_OFF -
diff --git a/common/gesture.c b/common/gesture.c
index 157e3c1f5a..8d9c744cf7 100644
--- a/common/gesture.c
+++ b/common/gesture.c
@@ -94,7 +94,7 @@ static int gesture_tap_for_battery(void)
 
 	/*
 	 * Running sums of data diffs for inner and outer windows.
-	 * Z data kept seperate from X and Y data
+	 * Z data kept separate from X and Y data
 	 */
 	static int sum_z_inner, sum_z_outer, sum_xy_inner, sum_xy_outer;
 
diff --git a/common/i2c.c b/common/i2c.c
index af2aa61133..165f343aa1 100644
--- a/common/i2c.c
+++ b/common/i2c.c
@@ -27,7 +27,7 @@
 #define CPUTS(outstr) cputs(CC_I2C, outstr)
 #define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
 
-/* Only chips with multi-port controllers will define I2C_CONTROLER_COUNT */
+/* Only chips with multi-port controllers will define I2C_CONTROLLER_COUNT */
 #ifndef I2C_CONTROLLER_COUNT
 #define I2C_CONTROLLER_COUNT I2C_PORT_COUNT
 #endif
diff --git a/common/main.c b/common/main.c
index 4c5d580ddd..513832f04f 100644
--- a/common/main.c
+++ b/common/main.c
@@ -137,7 +137,7 @@ test_mockable __keep int main(void)
 
 #ifdef CONFIG_WATCHDOG
 	/*
-	 * Intialize watchdog timer.  All lengthy operations between now and
+	 * Initialize watchdog timer.  All lengthy operations between now and
 	 * task_start() must periodically call watchdog_reload() to avoid
 	 * triggering a watchdog reboot.  (This pretty much applies only to
 	 * verified boot, because all *other* lengthy operations should be done
diff --git a/common/pd_log.c b/common/pd_log.c
index 7cbcf0c49a..2acf7bf8f7 100644
--- a/common/pd_log.c
+++ b/common/pd_log.c
@@ -20,7 +20,7 @@ BUILD_ASSERT(POWER_OF_TWO(LOG_SIZE));
 /*
  * The FIFO pointers are defined as following :
  * "log_head" is the next available event to dequeue.
- * "log_tail" is marking the end of the FIFO content (after last commited event)
+ * "log_tail" is marking the end of the FIFO content (after last committed event)
  * "log_tail_next" is the next available spot to enqueue events.
  * The pointers are not wrapped until they are used, so we don't need an extra
  * entry to disambiguate between full and empty FIFO.
diff --git a/common/spi_nor.c b/common/spi_nor.c
index dc69b19c3c..bd8983bcd7 100644
--- a/common/spi_nor.c
+++ b/common/spi_nor.c
@@ -141,7 +141,7 @@ static int spi_nor_read_jedec_id(const struct spi_nor_device_t *spi_nor_device,
 		return rv;
 
 	*out_mfn_bank = 0;
-	/* Go through the JEDEC ID a byate a time to looking for a manufacturer
+	/* Go through the JEDEC ID a byte a time to looking for a manufacturer
 	 * ID instead of the next bank indicator (0x7F). */
 	for (i = 0; i < SPI_NOR_JEDEC_ID_BANKS; i++) {
 		*out_mfn_id = jedec_id[i];
@@ -412,7 +412,7 @@ int spi_nor_init(void)
 	int rv = EC_SUCCESS;
 	size_t i;
 
-	/* Initiailize the state for each serial NOR flash device. */
+	/* Initialize the state for each serial NOR flash device. */
 	for (i = 0; i < SPI_NOR_DEVICE_COUNT; i++) {
 		uint8_t sfdp_major_rev, sfdp_minor_rev;
 		uint8_t table_major_rev, table_minor_rev;
diff --git a/common/tpm_registers.c b/common/tpm_registers.c
index b5c5f8b7e5..ba7cec183f 100644
--- a/common/tpm_registers.c
+++ b/common/tpm_registers.c
@@ -324,7 +324,7 @@ static void fifo_reg_write(const uint8_t *data, uint32_t data_size)
 	struct tpm_cmd_header *tpmh;
 
 	/*
-	 * Make sure we are in the approriate sate, otherwise ignore this
+	 * Make sure we are in the appropriate state, otherwise ignore this
 	 * access.
 	 */
 	if ((tpm_.state == tpm_state_ready) && (tpm_.fifo_write_index == 0))
@@ -363,7 +363,7 @@ static void fifo_reg_write(const uint8_t *data, uint32_t data_size)
 		return;
 	}
 
-	/* All data has been receved, Ready for the 'go' command. */
+	/* All data has been received, Ready for the 'go' command. */
 	tpm_.regs.sts &= ~expect;
 }
 
diff --git a/common/usb_pd_protocol.c b/common/usb_pd_protocol.c
index 4b49f0772e..d0773724e2 100644
--- a/common/usb_pd_protocol.c
+++ b/common/usb_pd_protocol.c
@@ -104,7 +104,7 @@ enum pd_dual_role_states drp_state = PD_DRP_TOGGLE_OFF;
 static uint32_t pd_src_caps[CONFIG_USB_PD_PORT_COUNT][PDO_MAX_OBJECTS];
 static int pd_src_cap_cnt[CONFIG_USB_PD_PORT_COUNT];
 
-/* Enable varible for Try.SRC states */
+/* Enable variable for Try.SRC states */
 static uint8_t pd_try_src_enable;
 #endif
 
@@ -1895,7 +1895,7 @@ void pd_task(void)
 
 			/* Send source cap some minimum number of times */
 			if (caps_count < PD_CAPS_COUNT) {
-				/* Query capabilites of the other side */
+				/* Query capabilities of the other side */
 				res = send_source_cap(port);
 				/* packet was acked => PD capable device) */
 				if (res >= 0) {
diff --git a/common/usb_pd_tcpc.c b/common/usb_pd_tcpc.c
index 8620138a64..a9ce499dbc 100644
--- a/common/usb_pd_tcpc.c
+++ b/common/usb_pd_tcpc.c
@@ -418,7 +418,7 @@ static int send_validate_message(int port, uint16_t header,
 				 * we have received a good packet
 				 * but not the expected GoodCRC,
 				 * the other side is trying to contact us,
-				 * bail out immediatly so we can get the retry.
+				 * bail out immediately so we can get the retry.
 				 */
 				return PD_TX_ERR_INV_ACK;
 			}
diff --git a/core/cortex-m/cpu.h b/core/cortex-m/cpu.h
index 2951f4b5e0..07e1c4b543 100644
--- a/core/cortex-m/cpu.h
+++ b/core/cortex-m/cpu.h
@@ -2,7 +2,7 @@
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  *
- * Registers map and defintions for Cortex-MLM4x processor
+ * Registers map and definitions for Cortex-MLM4x processor
  */
 
 #ifndef __CROS_EC_CPU_H
diff --git a/core/minute-ia/cpu.h b/core/minute-ia/cpu.h
index d2046fccb7..859a192dcf 100644
--- a/core/minute-ia/cpu.h
+++ b/core/minute-ia/cpu.h
@@ -2,7 +2,7 @@
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  *
- * Registers map and defintions for mIA LM2 processor
+ * Registers map and definitions for mIA LM2 processor
  */
 
 #ifndef __CROS_EC_CPU_H
diff --git a/core/minute-ia/interrupts.h b/core/minute-ia/interrupts.h
index c878a90968..1685fdc51a 100644
--- a/core/minute-ia/interrupts.h
+++ b/core/minute-ia/interrupts.h
@@ -2,7 +2,7 @@
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  *
- * Registers map and defintions for mIA LM2 processor
+ * Registers map and definitions for mIA LM2 processor
  */
 
 #ifndef __CROS_EC_IA32_INTERRUPTS_H
@@ -39,7 +39,7 @@ typedef struct {
 
 /* Default flags setting for entries in the IDT.
  * 7	- Present bit
- * 6:5	- Descriptor privilage level
+ * 6:5	- Descriptor privilege level
  * 4	- Storage segment (0 for interrupt gate)
  * 3:0	- Gate type (1110 = Interrupt gate)
  */
diff --git a/core/nds32/cpu.h b/core/nds32/cpu.h
index ada87cf716..2246ec7f77 100644
--- a/core/nds32/cpu.h
+++ b/core/nds32/cpu.h
@@ -2,7 +2,7 @@
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  *
- * Registers map and defintions for Andes cores
+ * Registers map and definitions for Andes cores
  */
 
 #ifndef __CROS_EC_CPU_H
diff --git a/driver/accelgyro_bmi160.c b/driver/accelgyro_bmi160.c
index da94b301eb..589206414e 100644
--- a/driver/accelgyro_bmi160.c
+++ b/driver/accelgyro_bmi160.c
@@ -809,7 +809,7 @@ static int config_interrupt(const struct motion_sensor_t *s)
 		BMI160_INT2_INPUT_EN | BMI160_LATCH_5MS);
 #endif
 
-	/* configure int1 as an interupt */
+	/* configure int1 as an interrupt */
 	ret = raw_write8(s->port, s->addr, BMI160_INT_OUT_CTRL,
 		BMI160_INT_CTRL(1, OUTPUT_EN));
 
diff --git a/driver/charger/bq24725.c b/driver/charger/bq24725.c
index 794d4f9a02..3b88207046 100644
--- a/driver/charger/bq24725.c
+++ b/driver/charger/bq24725.c
@@ -19,7 +19,7 @@
 #define REG_TO_CURRENT(REG, RS) ((REG) * DEFAULT_SENSE_RESISTOR / (RS))
 #define CURRENT_TO_REG(CUR, RS) ((CUR) * (RS) / DEFAULT_SENSE_RESISTOR)
 
-/* Charger infomation
+/* Charger information
  * charge voltage bitmask: 0111 1111 1111 0000
  * charge current bitmask: 0001 1111 1000 0000
  * input current bitmask : 0000 0000 1000 0000
diff --git a/driver/charger/bq24735.c b/driver/charger/bq24735.c
index 24a71c1deb..4279397330 100644
--- a/driver/charger/bq24735.c
+++ b/driver/charger/bq24735.c
@@ -20,7 +20,7 @@
 #define REG_TO_CURRENT(REG, RS) ((REG) * DEFAULT_SENSE_RESISTOR / (RS))
 #define CURRENT_TO_REG(CUR, RS) ((CUR) * (RS) / DEFAULT_SENSE_RESISTOR)
 
-/* Charger infomation
+/* Charger information
  * charge voltage bitmask: 0111 1111 1111 0000
  * charge current bitmask: 0001 1111 1000 0000
  * input current bitmask : 0000 0000 1000 0000
diff --git a/driver/charger/bq24738.c b/driver/charger/bq24738.c
index 752b8b0457..594257f833 100644
--- a/driver/charger/bq24738.c
+++ b/driver/charger/bq24738.c
@@ -19,7 +19,7 @@
 #define REG_TO_CURRENT(REG, RS) ((REG) * DEFAULT_SENSE_RESISTOR / (RS))
 #define CURRENT_TO_REG(CUR, RS) ((CUR) * (RS) / DEFAULT_SENSE_RESISTOR)
 
-/* Charger infomation
+/* Charger information
  * charge voltage bitmask: 0111 1111 1111 0000
  * charge current bitmask: 0001 1111 1100 0000
  * input current bitmask : 0000 0000 1000 0000
diff --git a/driver/pmu_tps65090_charger.c b/driver/pmu_tps65090_charger.c
index 6e56ef98ff..695b8a4897 100644
--- a/driver/pmu_tps65090_charger.c
+++ b/driver/pmu_tps65090_charger.c
@@ -205,7 +205,7 @@ static int calc_next_state(int state)
 	case ST_IDLE0:
 	case ST_BAD_COND:
 	case ST_IDLE:
-		/* Check AC and chiset state */
+		/* Check AC and chipset state */
 		if (!extpower_is_present()) {
 			if (chipset_in_state(CHIPSET_STATE_ON))
 				return ST_DISCHARGING;
@@ -429,8 +429,8 @@ void charger_task(void)
 #endif
 		/*
 		 * When battery is extremely low, the internal voltage can not
-		 * power on its gas guage IC. Charging loop will enable the
-		 * charger and turn on trickle charging. For safty reason,
+		 * power on its gas gauge IC. Charging loop will enable the
+		 * charger and turn on trickle charging. For safety reason,
 		 * charger should be disabled if the communication to battery
 		 * failed.
 		 */
diff --git a/driver/temp_sensor/tmp006.c b/driver/temp_sensor/tmp006.c
index 9801963ff5..67b31dfa98 100644
--- a/driver/temp_sensor/tmp006.c
+++ b/driver/temp_sensor/tmp006.c
@@ -173,7 +173,7 @@ static int tmp006_read_die_temp_k(const struct tmp006_data_t *tdata,
 }
 
 /*
- * This uses Tdie and Vobj and a bunch of magic parameters to calulate the
+ * This uses Tdie and Vobj and a bunch of magic parameters to calculate the
  * object temperature, Tobj.
  */
 static int tmp006_read_object_temp_k(struct tmp006_data_t *tdata,
diff --git a/include/accelgyro.h b/include/accelgyro.h
index 0432a0e896..883516bb3e 100644
--- a/include/accelgyro.h
+++ b/include/accelgyro.h
@@ -97,7 +97,7 @@ struct accelgyro_drv {
 	 * @event Event to process. May add other events for the next processor.
 	 *
 	 * Return EC_SUCCESS when one event is handled, EC_ERROR_NOT_HANDLED
-	 * when no events have been proccessed.
+	 * when no events have been processed.
 	 */
 	int (*irq_handler)(struct motion_sensor_t *s, uint32_t *event);
 #endif
@@ -106,7 +106,7 @@ struct accelgyro_drv {
 	 * Retrieve hardware FIFO from sensor,
 	 * - put data in Sensor Hub fifo.
 	 * - update sensor raw_xyz vector with the last information.
-	 * We put raw data in hub fifo and process data from theres.
+	 * We put raw data in hub fifo and process data from there.
 	 * @s Pointer to sensor data.
 	 */
 	int (*load_fifo)(struct motion_sensor_t *s);
@@ -118,7 +118,7 @@ struct accelgyro_drv {
 	 * @s Pointer to sensor data.
 	 * @activity activity to work on
 	 * @enable 1 to enable, 0 to disable
-	 * @data addtional data if needed, activity dependant.
+	 * @data additional data if needed, activity dependent.
 	 */
 	int (*manage_activity)(const struct motion_sensor_t *s,
 			       enum motionsensor_activity activity,
diff --git a/include/battery_smart.h b/include/battery_smart.h
index 72b4cf6544..94b291b4d9 100644
--- a/include/battery_smart.h
+++ b/include/battery_smart.h
@@ -56,7 +56,7 @@
 #define SB_DEVICE_NAME                  0x21
 #define SB_DEVICE_CHEMISTRY             0x22
 #define SB_MANUFACTURER_DATA            0x23
-/* Extention of smart battery spec, may not be supported on all platforms */
+/* Extension of smart battery spec, may not be supported on all platforms */
 #define SB_ALT_MANUFACTURER_ACCESS      0x44
 
 /* Battery mode */
diff --git a/include/charger.h b/include/charger.h
index a98e3e0f99..86ff5edc34 100644
--- a/include/charger.h
+++ b/include/charger.h
@@ -10,7 +10,7 @@
 
 #include "common.h"
 
-/* Charger infomation
+/* Charger information
  * voltage unit: mV
  * current unit: mA
  */
diff --git a/include/host_command.h b/include/host_command.h
index c9dcd3ddd8..9df4689f24 100644
--- a/include/host_command.h
+++ b/include/host_command.h
@@ -162,7 +162,7 @@ void host_clear_events(uint32_t mask);
 uint32_t host_get_events(void);
 
 /**
- * Send a response to the relevent driver for transmission
+ * Send a response to the relevant driver for transmission
  *
  * Once command processing is complete, this is used to send a response
  * back to the host.
diff --git a/include/i2c.h b/include/i2c.h
index 1514ce8f1a..38e632e38e 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -274,7 +274,7 @@ int i2c_unwedge(int port);
  * Read bytestream from <slaveaddr>:<offset> with format:
  *     [length_N] [byte_0] [byte_1] ... [byte_N-1]
  *
- * <len>      : the max length of receving buffer. to read N bytes
+ * <len>      : the max length of receiving buffer. to read N bytes
  *              ascii, len should be at least N+1 to include the
  *              terminating 0.
  * <len> == 0 : buffer size > 255
diff --git a/include/led_common.h b/include/led_common.h
index 51230fbeb3..964ad3bf02 100644
--- a/include/led_common.h
+++ b/include/led_common.h
@@ -17,7 +17,7 @@ extern const enum ec_led_id supported_led_ids[];
 extern const int supported_led_ids_count;
 
 /**
- * Enable or diable automatic control of an LED.
+ * Enable or disable automatic control of an LED.
  *
  * @param led_id	ID of LED to enable or disable automatic control.
  * @param enable	1 to enable . 0 to disable
diff --git a/include/smbus.h b/include/smbus.h
index 367ceceb8d..15d42084b0 100644
--- a/include/smbus.h
+++ b/include/smbus.h
@@ -126,7 +126,7 @@ int smbus_read_word(uint8_t i2c_port, uint8_t slave_addr,
  * @param plen uint8_t *, a pointer data length
  * @return error_code
  *       EC_SUCCESS if success; none-zero if fail
- *       EC_ERROR_BUSY if interface is bussy
+ *       EC_ERROR_BUSY if interface is busy
  *       none zero error code if fail
  */
 int smbus_read_block(uint8_t i2c_port, uint8_t slave_addr,
@@ -138,7 +138,7 @@ int smbus_read_block(uint8_t i2c_port, uint8_t slave_addr,
  * Read bytestream from <slaveaddr>:<smbus_cmd> with format:
  *     [length_N] [byte_0] [byte_1] ... [byte_N-1][byte_N='\0']
  *
- * <len>  : the max length of receving buffer. to read N bytes
+ * <len>  : the max length of receiving buffer. to read N bytes
  *          ascii, len should be at least N+1 to include the
  *          terminating 0 (NULL).
  *
diff --git a/power/tegra.c b/power/tegra.c
index 431ccd3da0..8f6ba9e4b1 100644
--- a/power/tegra.c
+++ b/power/tegra.c
@@ -120,7 +120,7 @@ static void chipset_turn_off_power_rails(void);
 /**
  * Set the AP RESET signal.
  *
- * This fucntion is for backward-compatible.
+ * This function is for backward-compatibility.
  *
  * AP_RESET_L (PB3) is stuffed before rev <= 2.0 and connected to PMIC RESET.
  * After rev >= 2.2, this is removed. This should not effected the new board.
@@ -180,7 +180,7 @@ static int check_for_power_off_event(void)
 		pressed = 1;
 	} else if (power_request == POWER_REQ_OFF) {
 		power_request = POWER_REQ_NONE;
-		return 4;  /* return non-zero for shudown down */
+		return 4;  /* return non-zero for shutdown */
 	}
 
 	now = get_time();
diff --git a/util/ec3po/console_unittest.py b/util/ec3po/console_unittest.py
index 82bf4ba212..768417df8f 100755
--- a/util/ec3po/console_unittest.py
+++ b/util/ec3po/console_unittest.py
@@ -587,7 +587,7 @@ class TestConsoleEditingMethods(unittest.TestCase):
     # Perform the same verification.
     CheckInputBufferPosition(self, len(test_str))
 
-    # We expect to see the test string, a jump to the begining of the line, and
+    # We expect to see the test string, a jump to the beginning of the line, and
     # one jump to the end of the line.
     exp_console_out = test_str
     # Jump to beginning.
diff --git a/util/openocd/npcx_cmds.tcl b/util/openocd/npcx_cmds.tcl
index a21b804997..579aa3834e 100644
--- a/util/openocd/npcx_cmds.tcl
+++ b/util/openocd/npcx_cmds.tcl
@@ -82,7 +82,7 @@ proc flash_npcx_ro {chip_name image_dir image_offset} {
 	# Halt CPU first
 	halt
 
-	# diable MPU for Data RAM
+	# disable MPU for Data RAM
 	mww $MPU_RNR  0x1
 	mww $MPU_RASR 0x0
 
@@ -109,7 +109,7 @@ proc flash_npcx_all {chip_name image_dir image_offset} {
 	# Halt CPU first
 	halt
 
-	# diable MPU for Data RAM
+	# disable MPU for Data RAM
 	mww $MPU_RNR  0x1
 	mww $MPU_RASR 0x0
 
diff --git a/util/stm32mon.c b/util/stm32mon.c
index 36b968f2c5..d38b0ed930 100644
--- a/util/stm32mon.c
+++ b/util/stm32mon.c
@@ -144,7 +144,7 @@ int open_serial(const char *port)
 	/*
 	 * tcsetattr() returns success if any of the modifications succeed, so
 	 * its return value of zero is not an indication of success, one needs
-	 * to check the result explicitely.
+	 * to check the result explicitly.
 	 */
 	tcsetattr(fd, TCSANOW, &cfg);
 	if (tcgetattr(fd, &cfg)) {