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| author | Mary Ruthven <mruthven@chromium.org> | 2021-11-09 20:14:39 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-11-18 04:54:01 +0000 |
| commit | 38c5d04ffb145ad5d38f8e9a832c1e4eff8376cc (patch) | |
| tree | b14a965627918fdd9f45a3627dedde936d2e0e9d | |
| parent | 0a2ce40cac360e5d32a3c659223b6f71e5365fee (diff) | |
| download | chrome-ec-38c5d04ffb145ad5d38f8e9a832c1e4eff8376cc.tar.gz | |
Revert "npcx: system: Add support for npcx7 series ec"
This reverts commit 375b60776156036ef458069c408e5ed4b24692f0.
BUG=b:200823466
TEST=make buildall -j
Change-Id: Ifdb60cbeab9409c9afeb0860f9510b6c8fd9cb58
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3273464
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
| -rw-r--r-- | core/cortex-m/ec.lds.S | 6 | ||||
| -rw-r--r-- | include/config.h | 7 |
2 files changed, 0 insertions, 13 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index a7c8e96227..60063b0f49 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -115,12 +115,6 @@ SECTIONS __ap_ro_root_key_hash_end = . ; . = ALIGN(4); STRINGIFY(OUTDIR/core/CORE/init.o) (.text) -#if defined(CHIP_FAMILY_NPCX7) && !defined(CONFIG_HIBERNATE_PSL) - /* Keep hibernate utility in last code ram block */ - . = ALIGN(4); - KEEP(*(.after_init)) - __after_init_end = .; -#endif *(.text*) #ifdef CONFIG_EXTERNAL_STORAGE . = ALIGN(4); diff --git a/include/config.h b/include/config.h index 97702cb231..8dce0ae0a0 100644 --- a/include/config.h +++ b/include/config.h @@ -2038,13 +2038,6 @@ */ #define CONFIG_SUPPORT_CHIP_HIBERNATION -/* - * Use PSL (Power Switch Logic) for hibernating. It turns off VCC power rail - * for ultra-low power consumption and uses PSL inputs rely on VSBY power rail - * to wake up ec and the whole system. - */ -#undef CONFIG_HIBERNATE_PSL - /* Use a hardware specific udelay(). */ #undef CONFIG_HW_SPECIFIC_UDELAY |