summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorVadim Sukhomlinov <sukhomlinov@google.com>2021-10-08 12:21:42 -0700
committerCommit Bot <commit-bot@chromium.org>2021-10-11 18:13:17 +0000
commitd1244d6f05b833db439901f7af4d691344f0c214 (patch)
tree43b16a841591c5cf0940dabf7b4560d485b1b9d3
parentd3b1de5a1e233787e8e1128a64237f4d09955ff5 (diff)
downloadchrome-ec-d1244d6f05b833db439901f7af4d691344f0c214.tar.gz
cr50: improve stability and performance of tpmtest on H1 Red board
Currently tpmtest.py fails to connect to H1 red board first time after it is flashed, which is not convenient. It looks like the workaround is to try to read any TPM register. So, implement a workaround. Frequency of FTDI can be safely increased to 2000Khz. Reduced delay to start transaction from 10ms to 200us which greatly improve overall testing (except for RSA which actually runs noticeable time). Overall time to run tests decreased from 165s to about 120s, but take into account RSA key gen tests alone are about 100s. BUG=none TEST=testtpm.py Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Change-Id: Ib67b71b36457b33f38135f9cec269dcf35881f54 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3214771 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
-rw-r--r--test/tpm_test/ftdi_spi_tpm.c10
-rwxr-xr-xtest/tpm_test/tpmtest.py2
2 files changed, 8 insertions, 4 deletions
diff --git a/test/tpm_test/ftdi_spi_tpm.c b/test/tpm_test/ftdi_spi_tpm.c
index 22e287af5e..c0fc2669e2 100644
--- a/test/tpm_test/ftdi_spi_tpm.c
+++ b/test/tpm_test/ftdi_spi_tpm.c
@@ -78,6 +78,7 @@ void FtdiStop(void)
mpsse_ = NULL;
}
+static int FtdiReadReg(unsigned reg_number, size_t bytes, void *buffer);
/*
* If the TPM is asleep we may need to poke it once to wake it up. Just assert
* the CS briefly without sending any data, then wait a bit to be sure it's
@@ -85,10 +86,13 @@ void FtdiStop(void)
*/
static void FtdiSpiPoke(void)
{
+ uint32_t did_vid;
+
Start(mpsse_);
- usleep(10000);
Stop(mpsse_);
usleep(60000);
+ /* Try to read register. */
+ FtdiReadReg(TPM_DID_VID_REG, sizeof(did_vid), &did_vid);
}
static void StartTransaction(int read_write, size_t bytes, unsigned addr)
@@ -99,10 +103,10 @@ static void StartTransaction(int read_write, size_t bytes, unsigned addr)
char *transfer_data;
/*
- * give it 10 ms. TODO(vbendeb): remove this once cr50 SPP TPM driver
+ * give it 200 us. TODO(vbendeb): remove this once cr50 SPP TPM driver
* performance is fixed.
*/
- usleep(10000);
+ usleep(200);
/*
* The first byte of the frame header encodes the transaction type
diff --git a/test/tpm_test/tpmtest.py b/test/tpm_test/tpmtest.py
index d664ca7567..782f609b77 100755
--- a/test/tpm_test/tpmtest.py
+++ b/test/tpm_test/tpmtest.py
@@ -54,7 +54,7 @@ class TPM:
STARTUP_RSP = ('80 01 00 00 00 0a 00 00 00 00',
'80 01 00 00 00 0a 00 00 01 00')
- def __init__(self, freq=800*1000, debug_mode=False):
+ def __init__(self, freq=2000*1000, debug_mode=False):
self._debug_enabled = debug_mode
self._handle = ftdi_spi_tpm
if not self._handle.FtdiSpiInit(freq, debug_mode):