diff options
author | Diana Z <dzigterman@chromium.org> | 2020-11-03 14:10:00 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-11-05 01:28:35 +0000 |
commit | 1044b2dfac75e861f00e03bcfe3231506ca2ae93 (patch) | |
tree | c0310eb2b479459e3dc53387e7003e0983c1f144 | |
parent | 23150c06baabe8db9796045036cb1f5a99e65647 (diff) | |
download | chrome-ec-1044b2dfac75e861f00e03bcfe3231506ca2ae93.tar.gz |
COIL: Rename local i2c variables in stm32f4
Rename local i2c variables and related comments to the new
controller/peripheral naming scheme.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ibb6a2bdfe47824be6412d999e6c4eb0303e6b421
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518658
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
-rw-r--r-- | chip/stm32/i2c-stm32f4.c | 72 |
1 files changed, 36 insertions, 36 deletions
diff --git a/chip/stm32/i2c-stm32f4.c b/chip/stm32/i2c-stm32f4.c index ac0a8a28f1..9113df017b 100644 --- a/chip/stm32/i2c-stm32f4.c +++ b/chip/stm32/i2c-stm32f4.c @@ -23,15 +23,15 @@ #define I2C_ERROR_FAILED_START EC_ERROR_INTERNAL_FIRST /* Transmit timeout in microseconds */ -#define I2C_TX_TIMEOUT_MASTER (10 * MSEC) +#define I2C_TX_TIMEOUT_CONTROLLER (10 * MSEC) #ifdef CONFIG_HOSTCMD_I2C_ADDR_FLAGS #if (I2C_PORT_EC == STM32_I2C1_PORT) -#define IRQ_SLAVE_EV STM32_IRQ_I2C1_EV -#define IRQ_SLAVE_ER STM32_IRQ_I2C1_ER +#define IRQ_PERIPHERAL_EV STM32_IRQ_I2C1_EV +#define IRQ_PERIPHERAL_ER STM32_IRQ_I2C1_ER #else -#define IRQ_SLAVE_EV STM32_IRQ_I2C2_EV -#define IRQ_SLAVE_ER STM32_IRQ_I2C2_ER +#define IRQ_PERIPHERAL_EV STM32_IRQ_I2C2_EV +#define IRQ_PERIPHERAL_ER STM32_IRQ_I2C2_ER #endif #endif @@ -133,7 +133,7 @@ void i2c_dma_enable_tc_interrupt(enum dma_channel stream, int port) #define UNSET 0 static int wait_sr1_poll(int port, int mask, int val, int poll) { - uint64_t timeout = get_time().val + I2C_TX_TIMEOUT_MASTER; + uint64_t timeout = get_time().val + I2C_TX_TIMEOUT_CONTROLLER; while (get_time().val < timeout) { int sr1 = STM32_I2C_SR1(port); @@ -164,14 +164,14 @@ static int wait_sr1(int port, int mask) /** - * Send a start condition and slave address on the specified port. + * Send a start condition and peripheral address on the specified port. * * @param port I2C port - * @param slave_addr Slave address, with LSB set for receive-mode + * @param addr_8bit I2C address, with LSB set for receive-mode * * @return Non-zero if error. */ -static int send_start(const int port, const uint16_t slave_addr_8bit) +static int send_start(const int port, const uint16_t addr_8bit) { int rv; @@ -181,8 +181,8 @@ static int send_start(const int port, const uint16_t slave_addr_8bit) if (rv) return I2C_ERROR_FAILED_START; - /* Write slave address */ - STM32_I2C_DR(port) = slave_addr_8bit; + /* Write peripheral address */ + STM32_I2C_DR(port) = addr_8bit; rv = wait_sr1_poll(port, STM32_I2C_SR1_ADDR, SET, 1); if (rv) return rv; @@ -224,7 +224,7 @@ static const struct i2c_port_t *find_port(int port) */ static int wait_fmpi2c_isr_poll(int port, int mask, int val, int poll) { - uint64_t timeout = get_time().val + I2C_TX_TIMEOUT_MASTER; + uint64_t timeout = get_time().val + I2C_TX_TIMEOUT_CONTROLLER; while (get_time().val < timeout) { int isr = STM32_FMPI2C_ISR(port); @@ -254,16 +254,16 @@ static int wait_fmpi2c_isr(int port, int mask) } /** - * Send a start condition and slave address on the specified port. + * Send a start condition and peripheral address on the specified port. * * @param port I2C port - * @param slave_addr Slave address + * @param addr_8bit I2C address * @param size bytes to transfer * @param is_read read, or write? * * @return Non-zero if error. */ -static int send_fmpi2c_start(const int port, const uint16_t slave_addr_8bit, +static int send_fmpi2c_start(const int port, const uint16_t addr_8bit, int size, int is_read) { uint32_t reg; @@ -274,7 +274,7 @@ static int send_fmpi2c_start(const int port, const uint16_t slave_addr_8bit, FMPI2C_CR2_RELOAD | FMPI2C_CR2_AUTOEND | FMPI2C_CR2_RD_WRN | FMPI2C_CR2_START | FMPI2C_CR2_STOP); reg |= FMPI2C_CR2_START | FMPI2C_CR2_AUTOEND | - slave_addr_8bit | FMPI2C_CR2_SIZE(size) | + addr_8bit | FMPI2C_CR2_SIZE(size) | (is_read ? FMPI2C_CR2_RD_WRN : 0); STM32_FMPI2C_CR2(port) = reg; @@ -392,7 +392,7 @@ static void fmpi2c_clear_regs(int port) * Perform an i2c transaction * * @param port i2c port to use - * @param slave_addr the i2c slave addr + * @param addr_8bit the i2c address * @param out source buffer for data * @param out_bytes bytes of data to write * @param in destination buffer for data @@ -401,7 +401,7 @@ static void fmpi2c_clear_regs(int port) * * @return EC_SUCCESS on success. */ -static int chip_fmpi2c_xfer(const int port, const uint16_t slave_addr_8bit, +static int chip_fmpi2c_xfer(const int port, const uint16_t addr_8bit, const uint8_t *out, int out_bytes, uint8_t *in, int in_bytes, int flags) { @@ -423,7 +423,7 @@ static int chip_fmpi2c_xfer(const int port, const uint16_t slave_addr_8bit, /* No out bytes and no in bytes means just check for active */ if (out_bytes || !in_bytes) { rv = send_fmpi2c_start( - port, slave_addr_8bit, out_bytes, FMPI2C_WRITE); + port, addr_8bit, out_bytes, FMPI2C_WRITE); if (rv) goto xfer_exit; @@ -449,7 +449,7 @@ static int chip_fmpi2c_xfer(const int port, const uint16_t slave_addr_8bit, i2c_dma_enable_tc_interrupt(dma->channel, port); rv_start = send_fmpi2c_start( - port, slave_addr_8bit, in_bytes, FMPI2C_READ); + port, addr_8bit, in_bytes, FMPI2C_READ); if (rv_start) goto xfer_exit; @@ -509,7 +509,7 @@ static int chip_fmpi2c_xfer(const int port, const uint16_t slave_addr_8bit, /* * Allow bus to idle for at least one 100KHz clock = 10 us. - * This allows slaves on the bus to detect bus-idle before + * This allows peripherals on the bus to detect bus-idle before * the next start condition. */ STM32_FMPI2C_CR1(port) &= ~FMPI2C_CR1_PE; @@ -548,11 +548,11 @@ static void i2c_clear_regs(int port) */ /* Perform an i2c transaction. */ -int chip_i2c_xfer(const int port, const uint16_t slave_addr_flags, +int chip_i2c_xfer(const int port, const uint16_t addr_flags, const uint8_t *out, int out_bytes, uint8_t *in, int in_bytes, int flags) { - int addr_8bit = I2C_STRIP_FLAGS(slave_addr_flags) << 1; + int addr_8bit = I2C_STRIP_FLAGS(addr_flags) << 1; int started = (flags & I2C_XFER_START) ? 0 : 1; int rv = EC_SUCCESS; int i; @@ -675,7 +675,7 @@ int chip_i2c_xfer(const int port, const uint16_t slave_addr_flags, /* * Allow bus to idle for at least one 100KHz clock = 10 us. - * This allows slaves on the bus to detect bus-idle before + * This allows peripherals on the bus to detect bus-idle before * the next start condition. */ usleep(10); @@ -790,7 +790,7 @@ static void i2c_send_response_packet(struct host_packet *pkt) /* * Set the transmitter to be in 'not full' state to keep sending - * '0xec' in the event loop. Because of this, the master i2c + * '0xec' in the event loop. Because of this, the controller i2c * doesn't need to snoop the response stream to abort transaction. */ STM32_I2C_CR2(host_i2c_resp_port) |= STM32_I2C_CR2_ITBUFEN; @@ -868,7 +868,7 @@ static void i2c_event_handler(int port) /* * Check for error conditions. Note, arbitration loss and bus error - * are the only two errors we can get as a slave allowing clock + * are the only two errors we can get as a peripheral allowing clock * stretching and in non-SMBus mode. */ if (i2c_sr1 & (STM32_I2C_SR1_ARLO | STM32_I2C_SR1_BERR)) { @@ -881,12 +881,12 @@ static void i2c_event_handler(int port) STM32_I2C_SR1_BERR); } - /* Transfer matched our slave address */ + /* Transfer matched our peripheral address */ if (i2c_sr1 & STM32_I2C_SR1_ADDR) { addr_8bit = ((i2c_sr2 & STM32_I2C_SR2_DUALF) ? STM32_I2C_OAR2(port) : STM32_I2C_OAR1(port)) & 0xfe; if (i2c_sr2 & STM32_I2C_SR2_TRA) { - /* Transmitter slave */ + /* Transmitter peripheral */ i2c_sr1 |= STM32_I2C_SR1_TXE; #ifdef CONFIG_BOARD_I2C_ADDR_FLAGS if (!rx_pending && !tx_pending) { @@ -895,7 +895,7 @@ static void i2c_event_handler(int port) } #endif } else { - /* Receiver slave */ + /* Receiver peripheral */ buf_idx = 0; rx_pending = 1; } @@ -909,7 +909,7 @@ static void i2c_event_handler(int port) disable_sleep(SLEEP_MASK_I2C_PERIPHERAL); } - /* I2C in slave transmitter */ + /* I2C in peripheral transmitter */ if (i2c_sr2 & STM32_I2C_SR2_TRA) { if (i2c_sr1 & (STM32_I2C_SR1_BTF | STM32_I2C_SR1_TXE)) { if (tx_pending) { @@ -942,7 +942,7 @@ static void i2c_event_handler(int port) STM32_I2C_DR(port) = 0xec; } } - } else { /* I2C in slave receiver */ + } else { /* I2C in peripheral receiver */ if (i2c_sr1 & (STM32_I2C_SR1_BTF | STM32_I2C_SR1_RXNE)) host_buffer[buf_idx++] = STM32_I2C_DR(port); } @@ -976,8 +976,8 @@ static void i2c_event_handler(int port) STM32_I2C_CR1(port) |= STM32_I2C_CR1_PE; } void i2c_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } -DECLARE_IRQ(IRQ_SLAVE_EV, i2c_event_interrupt, 2); -DECLARE_IRQ(IRQ_SLAVE_ER, i2c_event_interrupt, 2); +DECLARE_IRQ(IRQ_PERIPHERAL_EV, i2c_event_interrupt, 2); +DECLARE_IRQ(IRQ_PERIPHERAL_ER, i2c_event_interrupt, 2); #endif @@ -997,14 +997,14 @@ void i2c_init(void) /* Enable interrupts */ STM32_I2C_CR2(I2C_PORT_EC) |= STM32_I2C_CR2_ITEVTEN | STM32_I2C_CR2_ITERREN; - /* Setup host command slave */ + /* Setup host command peripheral */ STM32_I2C_OAR1(I2C_PORT_EC) = STM32_I2C_OAR1_B14 | (I2C_STRIP_ADDR(CONFIG_HOSTCMD_I2C_ADDR_FLAGS) << 1); #ifdef CONFIG_BOARD_I2C_ADDR_FLAGS STM32_I2C_OAR2(I2C_PORT_EC) = STM32_I2C_OAR2_ENDUAL | (I2C_STRIP_FLAGS(CONFIG_BOARD_I2C_ADDR_FLAGS) << 1); #endif - task_enable_irq(IRQ_SLAVE_EV); - task_enable_irq(IRQ_SLAVE_ER); + task_enable_irq(IRQ_PERIPHERAL_EV); + task_enable_irq(IRQ_PERIPHERAL_ER); #endif } |