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author | poornima tom <poornima.tom@intel.com> | 2021-08-02 19:49:24 +0530 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-08-18 05:54:42 +0000 |
commit | a8c33859992f1bb39b12650fcf6a5697938e9c14 (patch) | |
tree | 725ceddcb2c84742dad17d34a9c0c89392abddce | |
parent | 6579515b4b6df035bad7878b03f0522addeec44f (diff) | |
download | chrome-ec-a8c33859992f1bb39b12650fcf6a5697938e9c14.tar.gz |
adlrvp: Increase EC clock frequency
With all four PD tasks enabled, ADLRVP board was rebooting
with WDT errors. On increasing the frequency from 48MHZ
to 96MHZ, the issue got resolved.
BUG=b:195406641
BRANCH=None
TEST=ADL P RVP booting fine without any WDT errors
Signed-off-by: poornima tom <poornima.tom@intel.com>
Change-Id: I7f8ea030c2a9837f4468e2bcdd9fc6de00c33eb4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3067290
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: caveh jalali <caveh@chromium.org>
-rw-r--r-- | board/adlrvpp_ite/board.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/adlrvpp_ite/board.h b/board/adlrvpp_ite/board.h index 8552c5630f..a5f5c445ad 100644 --- a/board/adlrvpp_ite/board.h +++ b/board/adlrvpp_ite/board.h @@ -80,6 +80,10 @@ #define GPIO_FAN_POWER_EN GPIO_EC_THRM_SEN_PWRGATE_N #define GPIO_ALL_SYS_PWRGD GPIO_ALL_SYS_PWRGD_EC +/* Increase EC speed */ +#undef PLL_CLOCK +#define PLL_CLOCK 96000000 + #ifndef __ASSEMBLER__ enum adlrvp_i2c_channel { |