diff options
| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2021-07-28 23:35:57 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-17 20:55:26 +0000 |
| commit | 26226558f72567e8229d00e8890e2ed270b7b475 (patch) | |
| tree | 77b83b7a08d3ca21390357b34286100541587611 | |
| parent | 54fe315dc209dba6592acfe9195047ad69828312 (diff) | |
| download | chrome-ec-26226558f72567e8229d00e8890e2ed270b7b475.tar.gz | |
adlrvp_ite: Trigger TCPC interrupts on falling edge only
To avoid unnecessary waking of USBC task changed code to
Trigger TCPC interrupts on falling edge only.
BUG=none
BRANCH=none
TEST=Added print statements in ISR and observed, Type-C
interrupts are triggered only on falling edge only.
Change-Id: I91ea8a23fe9736fbd28ab302b4ccc44447470386
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060258
Reviewed-by: caveh jalali <caveh@chromium.org>
| -rw-r--r-- | board/adlrvpp_ite/gpio.inc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/board/adlrvpp_ite/gpio.inc b/board/adlrvpp_ite/gpio.inc index 877f5896c3..f4db15c4d5 100644 --- a/board/adlrvpp_ite/gpio.inc +++ b/board/adlrvpp_ite/gpio.inc @@ -46,27 +46,27 @@ GPIO_INT(UART_SERVO_TX_EC_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interr /* Using embedded TCPC for Port-0 */ UNIMPLEMENTED(USBC_TCPC_ALRT_P0) GPIO(NC_USBC_TCPC_ALRT_P0, PIN(I, 7), GPIO_INPUT) -GPIO_INT(USBC_TCPC_PPC_ALRT_P0, PIN(J, 5), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USBC_TCPC_PPC_ALRT_P0, PIN(J, 5), GPIO_INT_FALLING, ppc_interrupt) #if defined(HAS_TASK_PD_C1) -GPIO_INT(USBC_TCPC_ALRT_P1, PIN(G, 0), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USBC_TCPC_PPC_ALRT_P1, PIN(C, 4), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USBC_TCPC_ALRT_P1, PIN(G, 0), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USBC_TCPC_PPC_ALRT_P1, PIN(C, 4), GPIO_INT_FALLING, ppc_interrupt) #else GPIO(USBC_TCPC_ALRT_P1, PIN(G, 0), GPIO_INPUT) GPIO(USBC_TCPC_PPC_ALRT_P1, PIN(C, 4), GPIO_INPUT) #endif #if defined(HAS_TASK_PD_C2) -GPIO_INT(USBC_TCPC_ALRT_P2, PIN(J, 1), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USBC_TCPC_PPC_ALRT_P2, PIN(E, 5), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USBC_TCPC_ALRT_P2, PIN(J, 1), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USBC_TCPC_PPC_ALRT_P2, PIN(E, 5), GPIO_INT_FALLING, ppc_interrupt) #else GPIO(USBC_TCPC_ALRT_P2, PIN(J, 1), GPIO_INPUT) GPIO(USBC_TCPC_PPC_ALRT_P2, PIN(E, 5), GPIO_INPUT) #endif #if defined(HAS_TASK_PD_C3) -GPIO_INT(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USBC_TCPC_PPC_ALRT_P3, PIN(E, 6), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USBC_TCPC_PPC_ALRT_P3, PIN(E, 6), GPIO_INT_FALLING, ppc_interrupt) #else GPIO(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INPUT) GPIO(USBC_TCPC_PPC_ALRT_P3, PIN(E, 6), GPIO_INPUT) |