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authorJosie Nordrum <JosieNordrum@google.com>2021-02-18 15:11:21 -0700
committerCommit Bot <commit-bot@chromium.org>2021-05-11 16:53:41 +0000
commit232ac543514b7c84d3f2651b6528ba5ece4ea2f7 (patch)
tree9d79ae1e55c5f340861fd207ee5dac0de788aad0
parentc6ccbd49512ddf897ac76d9e92556754d3c3ba2a (diff)
downloadchrome-ec-232ac543514b7c84d3f2651b6528ba5ece4ea2f7.tar.gz
panic.c: force sync before reenabling bus faults
Force a sync between data and instruction pipelines before allowing bus faults. Remove sync from flash-stm32h7.c BRANCH=None BUG=b:157692395 TEST=tested with crrev.com/c/2576799 Signed-off-by: Josie Nordrum <JosieNordrum@google.com> Change-Id: Id67324191b4447d9be10c0b5aecc87620aa69d1d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2706039 Tested-by: Josie Nordrum <josienordrum@google.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Josie Nordrum <josienordrum@google.com> Auto-Submit: Josie Nordrum <josienordrum@google.com>
-rw-r--r--chip/stm32/flash-stm32h7.c3
-rw-r--r--core/cortex-m/panic.c5
2 files changed, 5 insertions, 3 deletions
diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c
index 2797720b8f..b539717158 100644
--- a/chip/stm32/flash-stm32h7.c
+++ b/chip/stm32/flash-stm32h7.c
@@ -90,7 +90,6 @@ static int unlock(int bank)
STM32_FLASH_KEYR(bank) = FLASH_KEYR_KEY1;
STM32_FLASH_KEYR(bank) = FLASH_KEYR_KEY2;
- asm volatile("dsb; isb");
ignore_bus_fault(0);
}
@@ -125,7 +124,6 @@ static int unlock_optb(void)
STM32_FLASH_OPTKEYR(0) = FLASH_OPTKEYR_KEY1;
STM32_FLASH_OPTKEYR(0) = FLASH_OPTKEYR_KEY2;
- asm volatile("dsb; isb");
ignore_bus_fault(0);
}
@@ -422,7 +420,6 @@ int flash_physical_protect_now(int all)
/* cannot modify the WP bits in the option bytes until reboot */
STM32_FLASH_OPTKEYR(0) = 0xffffffff;
option_disabled = 1;
- asm volatile("dsb; isb");
ignore_bus_fault(0);
return EC_SUCCESS;
diff --git a/core/cortex-m/panic.c b/core/cortex-m/panic.c
index 8fabaf4b21..2052656410 100644
--- a/core/cortex-m/panic.c
+++ b/core/cortex-m/panic.c
@@ -418,6 +418,11 @@ void bus_fault_handler(void)
void ignore_bus_fault(int ignored)
{
+ if (IS_ENABLED(CHIP_FAMILY_STM32H7)) {
+ if (ignored == 0)
+ asm volatile("dsb; isb");
+ }
+
/*
* Flash code might call this before cpu_init(),
* ensure that the bus faults really go through our handler.