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authorJosie Nordrum <JosieNordrum@google.com>2020-12-06 12:32:14 -0700
committerCommit Bot <commit-bot@chromium.org>2021-05-11 16:53:42 +0000
commit0574818bfb2b61051f28d8a6a30c76b502882250 (patch)
tree5d5bb0936addddcae17ff20ed53123df5fd83a31
parent232ac543514b7c84d3f2651b6528ba5ece4ea2f7 (diff)
downloadchrome-ec-0574818bfb2b61051f28d8a6a30c76b502882250.tar.gz
stm32: Add helper function for H7 flash ctrl regs
Add helper function definitions for H7 to API added in chromium:2220735. This should enable flash_physical test to run on Dartmonkey. Refactor code to pull flash registers function declarations from flash-reg.h instead of flash-f.h BRANCH=None BUG=b:157692395 TEST=On dartmonkey ./test/run_device_tests.py -t flash_physical => pass Signed-off-by: Josie Nordrum <josienordrum@google.com> Change-Id: I76846938748cbe77d534915856af0ebb7211d247 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2576799 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
-rw-r--r--chip/stm32/flash-f.h90
-rw-r--r--chip/stm32/flash-regs.h109
-rw-r--r--chip/stm32/flash-stm32f3.c1
-rw-r--r--chip/stm32/flash-stm32h7.c104
-rw-r--r--test/flash_physical.c9
5 files changed, 201 insertions, 112 deletions
diff --git a/chip/stm32/flash-f.h b/chip/stm32/flash-f.h
index 8d2b8e1fae..cbbe6ec86f 100644
--- a/chip/stm32/flash-f.h
+++ b/chip/stm32/flash-f.h
@@ -23,94 +23,4 @@ enum flash_rdp_level {
bool is_flash_rdp_enabled(void);
-/**
- * Unlock the flash control register using the unlock sequence.
- *
- * If the flash control register has been disabled since the last reset when
- * this function is called, a bus fault will be generated.
- *
- * See "3.5.1 Unlocking the Flash control register" in RM0402.
- */
-void unlock_flash_control_register(void);
-
-/**
- * Unlock the flash option bytes register using the unlock sequence.
- *
- * If the flash option bytes register has been disabled since the last reset
- * when this function is called, a bus fault will be generated.
- *
- * See "3.6.2 Programming user option bytes" in RM0402.
- */
-void unlock_flash_option_bytes(void);
-
-/**
- * Lock the flash control register.
- *
- * If the flash control register has been disabled since the last reset when
- * this function is called, a bus fault will be generated.
- *
- * See "3.5.1 Unlocking the Flash control register" in RM0402.
- */
-void lock_flash_control_register(void);
-
-/**
- * Lock the flash option bytes register.
- *
- * If the flash option bytes register has been disabled since the last reset
- * when this function is called, a bus fault will be generated.
- *
- * See "3.6.2 Programming user option bytes" in RM0402.
- */
-void lock_flash_option_bytes(void);
-
-/**
- * Disable the flash option bytes register.
- *
- * This function expects that bus faults have not already been ignored when
- * called.
- *
- * Once this function is called any attempt at accessing the flash option
- * bytes register will generate a bus fault until the next reset.
- *
- * See "3.6.2 Programming user option bytes" in RM0402.
- */
-void disable_flash_option_bytes(void);
-
-/**
- * Disable the flash control register.
- *
- * This function expects that bus faults have not already been ignored when
- * called.
- *
- * Once this function is called any attempt at accessing the flash control
- * register will generate a bus fault until the next reset.
- *
- * See "3.5.1 Unlocking the Flash control register" in RM0402.
- */
-void disable_flash_control_register(void);
-
-/**
- * Check if the flash option bytes are locked.
- *
- * If the flash option bytes register has been disabled since the last reset
- * when this function is called, a bus fault will be generated.
-
- * See "3.6.2 Programming user option bytes" in RM0402.
- *
- * @return true if option bytes are locked, false otherwise
- */
-bool flash_option_bytes_locked(void);
-
-/**
- * Check if the flash control register is locked.
- *
- * If the flash control register has been disabled since the last reset
- * when this function is called, a bus fault will be generated.
- *
- * See "3.5.1 Unlocking the Flash control register" in RM0402.
- *
- * @return true if register is locked, false otherwise
- */
-bool flash_control_register_locked(void);
-
#endif /* __CROS_EC_STM32_FLASH_F_H */
diff --git a/chip/stm32/flash-regs.h b/chip/stm32/flash-regs.h
new file mode 100644
index 0000000000..b0a46667a1
--- /dev/null
+++ b/chip/stm32/flash-regs.h
@@ -0,0 +1,109 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __CROS_EC_STM32_FLASH_REGS_H
+#define __CROS_EC_STM32_FLASH_REGS_H
+
+#include <stdbool.h>
+
+/**
+ * Unlock the flash control register using the unlock sequence.
+ *
+ * If the flash control register has been disabled since the last reset when
+ * this function is called, a bus fault will be generated.
+ *
+ * See "3.5.1 Unlocking the Flash control register" in RM0402.
+ * See "4.9.2 FLASH key register for bank 1" in RM0433.
+ */
+void unlock_flash_control_register(void);
+
+/**
+ * Unlock the flash option bytes register using the unlock sequence.
+ *
+ * If the flash option bytes register has been disabled since the last reset
+ * when this function is called, a bus fault will be generated.
+ *
+ * See "3.6.2 Programming user option bytes" in RM0402.
+ * See "4.9.3 FLASH option key register" in RM0433.
+ */
+void unlock_flash_option_bytes(void);
+
+/**
+ * Lock the flash control register.
+ *
+ * If the flash control register has been disabled since the last reset when
+ * this function is called, a bus fault will be generated.
+ *
+ * See "3.5.1 Unlocking the Flash control register" in RM0402.
+ * See "4.9.4 Flash control register for bank 1" in RM0433.
+ */
+void lock_flash_control_register(void);
+
+/**
+ * Lock the flash option bytes register.
+ *
+ * If the flash option bytes register has been disabled since the last reset
+ * when this function is called, a bus fault will be generated.
+ *
+ * See "3.6.2 Programming user option bytes" in RM0402.
+ * See "4.9.7 FLASH option control register" in RM0433.
+ */
+void lock_flash_option_bytes(void);
+
+/**
+ * Disable the flash option bytes register.
+ *
+ * This function expects that bus faults have not already been ignored when
+ * called.
+ *
+ * Once this function is called any attempt at accessing the flash option
+ * bytes register will generate a bus fault until the next reset.
+ *
+ * See "3.6.2 Programming user option bytes" in RM0402.
+ * See "4.9.7 FLASH option control register" in RM0433.
+ */
+void disable_flash_option_bytes(void);
+
+/**
+ * Disable the flash control register.
+ *
+ * This function expects that bus faults have not already been ignored when
+ * called.
+ *
+ * Once this function is called any attempt at accessing the flash control
+ * register will generate a bus fault until the next reset.
+ *
+ * See "3.5.1 Unlocking the Flash control register" in RM0402.
+ * See "4.9.4 Flash control register for bank 1" in RM0433.
+ */
+void disable_flash_control_register(void);
+
+/**
+ * Check if the flash option bytes are locked.
+ *
+ * If the flash option bytes register has been disabled since the last reset
+ * when this function is called, a bus fault will be generated.
+
+ * See "3.6.2 Programming user option bytes" in RM0402.
+ * See "4.9.7 FLASH option control register" in RM0433.
+ *
+ * @return true if option bytes are locked, false otherwise
+ */
+bool flash_option_bytes_locked(void);
+
+/**
+ * Check if the flash control register is locked.
+ *
+ * If the flash control register has been disabled since the last reset
+ * when this function is called, a bus fault will be generated.
+ *
+ * See "3.5.1 Unlocking the Flash control register" in RM0402.
+ * See "4.9.4 Flash control register for bank 1" in RM0433.
+ *
+ * @return true if register is locked, false otherwise
+ */
+bool flash_control_register_locked(void);
+
+#endif /* __CROS_EC_STM32_FLASH_REGS_H */
diff --git a/chip/stm32/flash-stm32f3.c b/chip/stm32/flash-stm32f3.c
index bae4315b67..563190b252 100644
--- a/chip/stm32/flash-stm32f3.c
+++ b/chip/stm32/flash-stm32f3.c
@@ -9,6 +9,7 @@
#include "common.h"
#include "flash.h"
#include "flash-f.h"
+#include "flash-regs.h"
#include "hooks.h"
#include "registers.h"
#include "system.h"
diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c
index b539717158..e020e1af1d 100644
--- a/chip/stm32/flash-stm32h7.c
+++ b/chip/stm32/flash-stm32h7.c
@@ -8,6 +8,7 @@
#include "clock.h"
#include "cpu.h"
#include "flash.h"
+#include "flash-regs.h"
#include "hooks.h"
#include "registers.h"
#include "panic.h"
@@ -110,11 +111,7 @@ static int unlock_optb(void)
if (unlock(0))
return EC_ERROR_UNKNOWN;
- /*
- * Always use bank 0 flash controller as there is only one option bytes
- * set for both banks.
- */
- if (STM32_FLASH_OPTCR(0) & FLASH_OPTCR_OPTLOCK) {
+ if (flash_option_bytes_locked()) {
/*
* We may have already locked the flash module and get a bus
* fault in the attempt to unlock. Need to disable bus fault
@@ -122,13 +119,12 @@ static int unlock_optb(void)
*/
ignore_bus_fault(1);
- STM32_FLASH_OPTKEYR(0) = FLASH_OPTKEYR_KEY1;
- STM32_FLASH_OPTKEYR(0) = FLASH_OPTKEYR_KEY2;
+ unlock_flash_option_bytes();
ignore_bus_fault(0);
}
- return STM32_FLASH_OPTCR(0) & FLASH_OPTCR_OPTLOCK ? EC_ERROR_UNKNOWN
- : EC_SUCCESS;
+ return flash_option_bytes_locked() ? EC_ERROR_UNKNOWN
+ : EC_SUCCESS;
}
static int commit_optb(void)
@@ -142,7 +138,7 @@ static int commit_optb(void)
while (STM32_FLASH_OPTSR_CUR(0) & FLASH_OPTSR_BUSY && timeout-- > 0)
;
- STM32_FLASH_OPTCR(0) |= FLASH_OPTCR_OPTLOCK;
+ lock_flash_option_bytes();
lock(0);
return (timeout > 0) ? EC_SUCCESS : EC_ERROR_TIMEOUT;
@@ -158,6 +154,87 @@ static void protect_blocks(uint32_t blocks)
commit_optb();
}
+
+/*
+ * Helper function definitions for consistency with F4 to enable flash
+ * physical unitesting
+ */
+void unlock_flash_control_register(void)
+{
+ unlock(0);
+ unlock(1);
+}
+
+void unlock_flash_option_bytes(void)
+{
+ /*
+ * Always use bank 0 flash controller as there is only one option bytes
+ * set for both banks. See http://b/181130245
+ *
+ * Consecutively program values. Ref: RM0433:4.9.2
+ */
+ STM32_FLASH_OPTKEYR(0) = FLASH_OPTKEYR_KEY1;
+ STM32_FLASH_OPTKEYR(0) = FLASH_OPTKEYR_KEY2;
+}
+
+void disable_flash_option_bytes(void)
+{
+ ignore_bus_fault(1);
+ /*
+ * Always use bank 0 flash controller as there is only one option bytes
+ * set for both banks. See http://b/181130245
+ *
+ * Writing anything other than the pre-defined keys to the option key
+ * register results in a bus fault and the register being locked until
+ * reboot (even with a further correct key write).
+ */
+ STM32_FLASH_OPTKEYR(0) = 0xffffffff;
+ ignore_bus_fault(0);
+}
+
+void disable_flash_control_register(void)
+{
+ ignore_bus_fault(1);
+ /*
+ * Writing anything other than the pre-defined keys to a key
+ * register results in a bus fault and the register being locked until
+ * reboot (even with a further correct key write).
+ */
+ STM32_FLASH_KEYR(0) = 0xffffffff;
+ STM32_FLASH_KEYR(1) = 0xffffffff;
+ ignore_bus_fault(0);
+}
+
+void lock_flash_control_register(void)
+{
+ lock(0);
+ lock(1);
+}
+
+void lock_flash_option_bytes(void)
+{
+ /*
+ * Always use bank 0 flash controller as there is only one option bytes
+ * set for both banks. See http://b/181130245
+ */
+ STM32_FLASH_OPTCR(0) |= FLASH_OPTCR_OPTLOCK;
+}
+
+bool flash_option_bytes_locked(void)
+{
+ /*
+ * Always use bank 0 flash controller as there is only one option bytes
+ * set for both banks. See http://b/181130245
+ */
+ return !!(STM32_FLASH_OPTCR(0) & FLASH_OPTCR_OPTLOCK);
+}
+
+bool flash_control_register_locked(void)
+{
+ return !!(STM32_FLASH_CR(0) & FLASH_CR_LOCK) &&
+ !!(STM32_FLASH_CR(1) & FLASH_CR_LOCK);
+}
+
/*
* If RDP as PSTATE option is defined, use that as 'Write Protect enabled' flag:
* it makes no sense to be able to unlock RO, as that'd allow flashing
@@ -409,18 +486,15 @@ int flash_physical_protect_now(int all)
* permanently locked until reset, a correct keyring write
* will not unlock it.
*/
- ignore_bus_fault(1);
if (all) {
/* cannot do any write/erase access until next reboot */
- STM32_FLASH_KEYR(0) = 0xffffffff;
- STM32_FLASH_KEYR(1) = 0xffffffff;
+ disable_flash_control_register();
access_disabled = 1;
}
/* cannot modify the WP bits in the option bytes until reboot */
- STM32_FLASH_OPTKEYR(0) = 0xffffffff;
+ disable_flash_option_bytes();
option_disabled = 1;
- ignore_bus_fault(0);
return EC_SUCCESS;
}
diff --git a/test/flash_physical.c b/test/flash_physical.c
index e5430f4bd0..06dd495254 100644
--- a/test/flash_physical.c
+++ b/test/flash_physical.c
@@ -3,7 +3,7 @@
* found in the LICENSE file.
*/
-#include "chip/stm32/flash-f.h"
+#include "chip/stm32/flash-regs.h"
#include "flash.h"
#include "panic.h"
#include "test_util.h"
@@ -123,15 +123,10 @@ void run_test(int argc, char **argv)
{
ccprintf("Running flash physical test\n");
RUN_TEST(test_flash_config);
- /*
- * TODO(b/157692395): These should be implemented for the STM32H743 as
- * well.
- */
-#if defined(CHIP_VARIANT_STM32F412)
+
RUN_TEST(test_lock_option_bytes);
RUN_TEST(test_disable_option_bytes);
RUN_TEST(test_lock_flash_control_register);
RUN_TEST(test_disable_flash_control_register);
-#endif
test_print_result();
}